參數(shù)資料
型號(hào)： DJCE6353882077
廠商： INTEL CORP
元件分類： 接收器
英文描述： Nordig Unified DVB-T COFDM Terrestrial Demodulator for PC-TV and Hand-held Digital TV (DTV)
中文描述： VIDEO DISCRIMINATOR, QFP64
封裝： LQFP-64
文件頁(yè)數(shù)： 12/26頁(yè)
文件大小： 322K
代理商： DJCE6353882077
CE6353
Data Sheet
12
Intel Corporation
The bandwidth of the AGC is set to a large value for quick acquisition then reduced to a small value for tracking.
The AGC is free running during OFDM channel changes and locks to the new channel while the tuner lock is being
established. This is one of the features of CE6353 used to minimize acquisition time. A robust AGC lock
mechanism is provided and the other parts of the CE6353 begin to acquire only after the AGC has locked.
2.3 IF to Baseband Conversion
Sampling a 36.17 MHz IF signal at 45 MHz results in a spectrally inverted OFDM signal centred at
approximately 8.9 MHz. The first step of the demodulation process is to convert this signal to a complex (in-phase
and quadrature) signal in baseband. A correction for spectral inversion is implemented during this conversion
process. Note also that the CE6353 has control mechanisms to search automatically for an unknown spectral
inversion status.
2.4 Adjacent Channel Filtering
Adjacent channels, in particular the Nicam digital sound signal associated with analog channels, are filtered prior to
the FFT.
2.5 Interpolation and Clock Synchronization
CE6353 uses digital timing recovery and this eliminates the need for an external VCXO. The ADC samples the
signal at a fixed rate, for example, 45.056 MHz. Conversion of the 45.056 MHz signal to the OFDM sample rate is
achieved using the time-varying interpolator. The OFDM sample rate is 64/7 MHz for 8 MHz and this is scaled by
factors 6/8 and 7/8 for 6 and 7 MHz channel bandwidths. The nominal ratio of the ADC to OFDM sample rate is
programmed in a CE6353 register (defaults are for 45 MHz sampling and 8 MHz OFDM). The clock recovery phase
locked loop in the CE6353 compensates for inaccuracies in this ratio due to uncertainties of the frequency of the
sampling clock.
2.6 Carrier Frequency Synchronization
There can be frequency offsets in the signal at the input to OFDM, partly due to tuner step size and partly due to
broadcast frequency shifts, typically 1/6 MHz. These are tracked out digitally, up to 1 MHz in 2 K and 8 K modes,
without the need for an analog frequency control (AFC) loop.
The default frequency capture range has been set to ±286 kHz in the 2 K and 8 K mode. However, these values
can be increased, if necessary, by programming an on-chip register (see 7.4.1). It is recommended that a larger
capture range be used for channel scan in order to find channels with broadcast frequency shifts, without having to
adjust the tuner. After the OFDM module has locked (the AFC will have been previously disabled), the frequency
offset can be read from an on-chip register.
2.7 Symbol Timing Synchronization
This module computes the optimum sample position to trigger the FFT in order to eliminate or minimize inter-
symbol interference in the presence of multi-path distortion. Furthermore, this trigger point is continuously updated
to dynamically adapt to time-variations in the transmission channel.
2.8 Fast Fourier Transform
The FFT module uses the trigger information from the timing synchronization module to set the start point for an
FFT. It then uses either a 2 K or 8 K FFT to transform the data from the time domain to the frequency domain. An
extremely hardware-efficient and highly accurate algorithm has been used for this purpose.
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