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參數(shù)資料
| 型號(hào)： | DJA |
| 廠商： | Lineage Power |
| 英文描述： | Digital Jitter Attenuation (DJA) Controller(數(shù)字信號(hào)抖動(dòng)衰減控制器) |
| 中文描述： | 數(shù)字抖動(dòng)衰減（DJA信息）控制器（數(shù)字信號(hào)抖動(dòng)衰減控制器） |
| 文件頁(yè)數(shù)： | 2/2頁(yè) |
| 文件大?。?/td> | 111K |
| 代理商： | DJA |
Product Brief
September 2000
Digital Jitter Attenuation Controller
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No
rights under any patent accompany the sale of any such product(s) or information.
Copyright 2000 Lucent Technologies Inc.
All Rights Reserved
September 2000
PB00-106NCIP
For additional information, contact your Microelectronics Group Account Manager or the following:
INTERNET:
http://www.lucent.com/micro
, or for FPGA information,
http://www.lucent.com/orca
E-MAIL:
docmaster@micro.lucent.com
N. AMERICA:
Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286
1-800-372-2447
, FAX 610-712-4106 (In CANADA:
1-800-553-2448
, FAX 610-712-4106)
ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256
Tel. (65) 778 8833
, FAX (65) 777 7495
CHINA:
Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai
200233 P R. China
Tel. (86) 21 6440 0468
,
ext. 325
, FAX (86) 21 6440 0652
JAPAN:
Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan
Tel. (81) 3 5421 1600
, FAX (81) 3 5421 1700
EUROPE:
Data Requests: MICROELECTRONICS GROUP DATALINE:
Tel. (44) 7000 582 368
, FAX (44) 1189 328 148
Technical Inquiries: GERMANY:
(49) 89 95086 0
(Munich), UNITED KINGDOM:
(44) 1344 865 900
(Ascot),
FRANCE:
(33) 1 40 83 68 00
(Paris), SWEDEN:
(46) 8 594 607 00
(Stockholm), FINLAND:
(358) 9 3507670
(Helsinki),
ITALY:
(39) 02 6608131
(Milan), SPAIN:
(34) 1 807 1441
(Madrid)
Functional Block Diagram of the DJA Block
The functional view of the DJA block, along with interconnections to the other blocks within the Super Mapper
device, are shown in Figure 2.
The DJA block interfaces only to the cross connect and microprocessor interface blocks within the Super Mapper
device. The input interface between the DJA block and the cross connect block consists of clock, serial data, VT
pointer adjustment indication, and AIS insert indication. The output interface consists of clock, serial data, and AIS
insert indication, as well as the DS1 and E1 AIS clocks for use by other blocks within the device.
0409 (F)
Figure 2. Basic Functional Flow of the DJA Block
JITTER
ATTENUATION
BLOCK
AIS CLOCK
GENERATION
BLOCK REPEATED 28 TIMES
E1_XCLK
DS1_XCLK
XC_JPTRADJx
XC_JDATAx
XC_JCLKx
XC_JAISx
DJA_AUTOAISx
DJA_DATAx
DJA_CLKx
DS1_AISCLK
E1_AISCLK
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