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| 型號(hào)： | DEMO56F8014-E |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 47/124頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DEMO MC56F8014 W/UNIV PS |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | 56F8014 |
| 所含物品： | 板，線纜，CD，電源 |
| 配用： | APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM |
| 相關(guān)產(chǎn)品： | MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP |
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Pin Descriptions
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
29
3.5 Pin Descriptions
3.5.1
External Reference (GPIOB6 / RXD / SDA / CLKIN)
After reset, the internal relaxation oscillator is selected as the clock source for the chip. The user then has
the option of switching to an external clock reference by enabling the PRECS bit in the OCCS Oscillator
Control register, if desired.
Part 4 Memory Map
4.1 Introduction
The 56F8014 device is a 16-bit motor-control chip based on the 56800E core. It uses a Harvard-style
architecture with two independent memory spaces for Data and Program. On-chip RAM is used in both
spaces and Flash memory is used only in Program space.
This section provides memory maps for:
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
On-chip memory sizes for the device are summarized in Table 4-1. Flash memories’ restrictions are
identified in the “Use Restrictions” column of Table 4-1.
4.2 Interrupt Vector Table
Table 4-2 provides the 56F8014’s reset and interrupt priority structure, including on-chip peripherals. The
table is organized with higher-priority vectors at the top and lower-priority interrupts lower in the table.
As indicated, the priority of an interrupt can be assigned to different levels, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see Section 5.5.6
for the reset value of the VBA.
By default, the chip reset address and COP reset address will correspond to vector 0 and 1 of the interrupt
vector table. In these instances, the first two locations in the vector table must contain branch or JMP
instructions. All other entries must contain JSR instructions.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8014
Use Restrictions
Program Flash
(PFLASH)
8k x 16
Erase / Program via Flash interface unit and word writes to CDBW
Unified RAM (ram)
2k x 16
Usable by both the Program and Data memory spaces
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DEMO56F8014 | BOARD DEMO MC56F8014 W/US PS |
| VE-BTR-EY-F2 | CONVERTER MOD DC/DC 7.5V 50W |
| VE-BTR-EY-F1 | CONVERTER MOD DC/DC 7.5V 50W |
| VE-BTR-EX-S | CONVERTER MOD DC/DC 7.5V 75W |
| VE-BTR-EW-S | CONVERTER MOD DC/DC 7.5V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DEMO56F8014-EE | 功能描述:開(kāi)發(fā)板和工具包 - 其他處理器 MC56F8014 BD W/UNIV PS RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| DEMO90121DA | 功能描述:KIT DEMO RFID DOOR ACCESS RoHS:是 類別:RF/IF 和 RFID >> 過(guò)時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:用于 200/300 系列的歐盟開(kāi)發(fā)套件 適用于相關(guān)產(chǎn)品:Zensys RF 模塊 所含物品:開(kāi)發(fā)板，模塊，編程器，軟件，線纜，電源 其它名稱:703-1019Q3225667 |
| DEMO90121LR | 功能描述:KIT DEMO LONG RANGE READER RoHS:是 類別:RF/IF 和 RFID >> RFID 評(píng)估和開(kāi)發(fā)套件及電路板 系列:- 產(chǎn)品培訓(xùn)模塊:M24LR64 Dual Interface EEPROM 標(biāo)準(zhǔn)包裝:1 系列:- 類型:讀取器模塊 頻率:13.56MHz 適用于相關(guān)產(chǎn)品:M24LR-64-R 已供物品:2 根基準(zhǔn)天線，I2C 和 RFID 讀取器，樣品 其它名稱:497-10480 |
| DEMO908AP64 | 功能描述:開(kāi)發(fā)板和工具包 - S08 / S12 MC68HC908AP64 DEMO BRD RoHS:否 產(chǎn)品:Development Kits 工具用于評(píng)估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
| DEMO908AP64E | 功能描述:開(kāi)發(fā)板和工具包 - S08 / S12 MC68HC908AP64 Demo Board RoHS:否 產(chǎn)品:Development Kits 工具用于評(píng)估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
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