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參數(shù)資料
| 型號(hào)： | DEM-DAI1742 |
| 英文描述： | EVALUATION FIXTURE |
| 中文描述： | 評(píng)價(jià)夾具 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大小： | 281K |
| 代理商： | DEM-DAI1742 |
DEM-DAI1742
SBAU034
2
HARDWARE DESCRIPTION
POWER SUPPLIES
The DEM-DAI1742 evaluation fixture requires three power
supplies for operating the PCM1742, the digital support
circuitry, and the low-pass filter op amp. Standard banana
jacks are provided for all power-supply connections.
Connector CN054 provides the +5V supply required for
V
CC
. It is used to power the analog sections of the PCM1742,
as well as the digital audio receiver (U002) and associated
logic (U003 and U004).
Connectors CN051 (AV
CC
+) and CN053 (AV
CC
–) are used
to power the OPA2134 dual op amp (U101) that performs
the DAC output low-pass filter function. AV
CC
+ may be set
from +5V to +18V, while AV
CC
– may be set from –5V
to –18V.
Ground connections are made at connectors CN052 and
CN055. Both are connected to the ground plane of the DEM-
DAI1742 board.
In addition to the three required external power supplies, a
+3.3V supply is required for the PCM1742. The +3.3V
supply is typically derived from V
CC
using an onboard linear
regulator, the REG1117-3.3 (U051). A jumper must be
installed at CN057 to connect the regulator output to the
PCM1742.
A connector (CN056) is provided for connection to an
optional external +3.3V power supply. When using CN056,
the jumper at CN057 must be removed in order to disable the
regulator output.
ANALOG OUTPUTS
The left and right audio outputs are available at RCA jacks
CN104 and CN105 respectively. The outputs are taken from
the low-pass filter, which has a gain of 2. The low-pass filter
may be configured for one of two cutoff frequencies: 54kHz
or 108kHz. Typically, the 54kHz cutoff frequency is used
for all measurements.
For f
-3dB
= 54kHz, jumpers JP101 through JP106 must all be
installed.
For f-
3dB
= 108kHz, jumpers JP101 through JP106 must all
be removed.
ZERO-FLAG OUTPUTS
The zero flags for the left and right channels are brought out
at connector CN103. ZFGL is the zero flag for the left
channel, while ZFGR is the zero flag for the right channel.
Refer to the PCM1742 data sheet for detailed information
regarding the zero-flag outputs.
DIGITAL AUDIO INTERFACE
A digital audio receiver (U002) is provided for easy connec-
tion to S/PDIF and optical signal sources, including audio test
systems (Audio Precision, Rhode & Schwarz) and commer-
cial audio equipment (CD and DVD players). The receiver
can operate at rates up to a 96kHz with 24-bit audio data.
Switches SW001 through SW003 are used to set the receiver
output data format, as shown in Table I. Table II shows the
jumper configuration for JP001 for normal operation.
SW001
SW002
SW003
RECEIVER OUTPUT DATA FORMAT
L
L
H
L
L
H
L
H
L
L
H
H
16- to 24-Bit Left-Justified
16- to 24-Bit I
2
S
16-Bit Right-Justified (or Standard)
18-Bit Right-Justified (or Standard)
TABLE I. Digital Audio Receiver Configuration.
Switch SW004 is a normally open, momentary-contact push-
button switch used to reset the digital audio receiver when
necessary.
The demonstration board also supports direct interfacing to
audio decoders and signal processors via connector CN004
(unpopulated). SCLK, BCK, LRCK, and DATA are avail-
able and buffered by U005. In addition, +5V (V
CC
) and
Ground are available at CN004. Switch SW005 is used to
select between the digital audio receiver and connector
CN004 as the source of the audio interface. Table III shows
the available switch settings.
16-BIT
RIGHT
JUSTIFIED
FORMAT
18-BIT
RIGHT
JUSTIFIED
FORMAT
16- TO 24-BIT
LEFT
JUSTIFIED
FORMAT
16- TO 24-BIT
I
2
S
FORMAT
JP001
JUMPER
CLKO
SCLK
GND
BCK
BCK (L.Just.)
LRCK
DATA
X
O
O
O
NC
O
O
X
O
O
O
NC
O
O
X
O
O
O
NC
O
O
X
O
O
NC
O
O
O
NOTE: O = Install Jumper; NC = Remove Jumper; X = Don
’
t Care,
TABLE II. JP001 Jumper Configuration.
SW005
SETTING
SOURCE SELECTION
INT
EXT
Digital Audio Receiver (U002)
Connector CN004 via Buffer U005
TABLE III. Digital Audio Source Selection.
DIP-SWITCH CONFIGURATION
Switch SW006 is not utilized for the PCM1742. It is in-
cluded for future products that may be compatible with this
demonstration board. All switch elements must be set to the
OFF position for the PCM1742.
PC PARALLEL PORT/HOST CONNECTOR
The evaluation fixture includes a Centronics connector, CN003,
thatis used to connect to a PC parallel port or an alternative
host controller. This connector is utilized to access the serial
control port of the PCM1742. The serial control port is used to
program the PCM1742’s internal registers. A standard printer
cable is used to connect CN003 of the evaluation fixture to a
PC parallel port. The port signals are buffered using U006.
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