參數(shù)資料
型號: DEM-OPA660-2GC
英文描述: DEM-OPA660-2GC - DISCONTINUED PRODUCT. No longer recommended for new design.
中文描述: DEM的OPA660 - 2GC -已停產(chǎn)產(chǎn)品。不再推薦用于新設計。
文件頁數(shù): 1/2頁
文件大?。?/td> 40K
代理商: DEM-OPA660-2GC
1998 Burr-Brown Corporation
LI-515A
Printed in U.S.A. October, 1999
DEM-OPA268xN
EVALUATION FIXTURE
DESCRIPTION
The DEM-OPA268xN demonstration board is an
unpopulated printed circuit board (PCB) for the high
speed dual op amps with disable available in SO-14
packages. The DEM-OPA268xN supports Burr-
Brown’s OPA2680N, OPA2681N, and OPA2682N.
Figure 1 shows the package pinout for this PCB. For
more information on these op amps, and good PCB
layout techniques, see the individual op amp data sheets.
of 5 per customer.
FIGURE 2. Circuit Schematic for DEM-OPA268xN.
PART
DESCRIPTION
C
1
, C
2
Tantalum Chip Capacitor, SMD EIA size 3528, 20V
C
3
- C
6B
Multi-Layer Ceramic Chip Cap., SMD 1206, 50V
J
1A
- J
3B
SMA or SMB Board Jack (Amphenol 901-144-8)
L
1
, L
2
EMI-Suppression Ferrite Chip, SMD 1206
(Steward LI 1206 B 900 R)
P
1
Terminal Block, 3.5mm centers
(On-Shore Technology ED555/3DS)
R
1A
- R
8B
Metal Film Chip Resistor, SMD 1206, 1/8W
TABLE I. Part Descriptions.
TABLE II. Disable Pin—OPA268xN.
For single supply operation, do not connect L
2
; other-
wise, the –V
S
input to P
1
would be at ground potential.
Disable Pins
—Pins 3 and 5 disable op amps A and B
when low. Table II shows different ways to set up the
voltage on these pins.
Top View
SO-14
1
2
3
4
5
6
7
14
13
12
11
10
9
8
–In A
+In A
DIS A
–V
S
DIS B
+In B
–In B
Out A
NC
NC
+V
S
NC
NC
Out B
FIGURE 1. Pin Configuration.
CIRCUIT
The circuit schematic in Figure 2 shows the connec-
tions for all possible components. Each model will
only use some of the components.
COMPONENTS
Components that have RF performance similar to the
ones in Table I may be substituted.
R
1
and R
7
set the I/O impedance, R
2
- R
6
set the gain,
R
8
and C
6
set up the disable pin, and C
1
- C
5
are supply
bypass capacitors. C
3
is optional; it adds a bypass
between the supplies, which improves distortion per-
formance for some models. L
1
and L
2
are ferrite chips
that can reduce interactions with the power supply at
high frequencies; if not desired, they can be replaced
with 0
resistors.
CONFIGURATION
R
8
C
6
External Service
On
Off
49.9
Open
0
Open
0.1
μ
F
Open
R
4A
R
2A
R
3A
R
7A
Out A
J
2A
GND
+V
S
–V
S
P
1
2
3
C
6A
5
4
11
14
1
C
3
R
8A
C
2
R
1A
IN A
J
1A
R
5A
R
6A
R
6B
+
L
2
L
1
C
1
+
R
4B
R
2B
R
3B
R
7B
Out B
6
8
7
R
1B
IN B
R
5B
C
6B
C
4
C
5
DIS A
J
3A
R
8B
DIS B
J
3B
J
2B
J
1B
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
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