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參數(shù)資料
| 型號： | DDC114 |
| 英文描述： | Quad Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 四路電流輸入20位模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 19/30頁 |
| 文件大?。?/td> | 389K |
| 代理商： | DDC114 |
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SBAS255A JUNE 2004 REVISED NOVEMBER 2004
www.ti.com
19
Looking at the state diagram, one can see that the CONV
pattern needed to generate a given state progression is not
unique. Upon entering states 1 or 8, the DDC114 remains
in those states until mbsy goes low, independent of CONV.
As long as the m/r/az cycle is underway, the state machine
ignores CONV (see Figure 10, page 14). The top two
signals in Figure 16 are are different CONV patterns that
produce the same state. This feature allows flexibility in
generating ncont mode CONV patterns. For example, the
DDC114 Evaluation Fixture operates in the ncont mode by
generating a square wave with pulse width < t
6
. Figure 17
illustrates operation in the ncont mode using a 50% duty
cycle CONV signal with T
INT
= 512 CLK periods. Care
must be exercised when using a square wave to generate
CONV. There are certain integration times that must be
avoided since they produce very short intervals for state 2
(or state 7 if CONV is inverted). As seen in the state
diagram, the state progresses from 2 to 3 as soon as
CONV is high. The state machine does not insure that the
duration of state 2 is long enough to properly prepare the
next side for integration (t
11
). This must be done by the
user with proper timing of CONV. For example, if CONV is
a square wave with T
INT
= 970 CLK periods, state 2 will
only be 9 CLK periods long; therefore, t
11
will not be met.
CONV1
CONV2
2
3
1
3
4
4
1
2
State
mbsy
Figure 16. Equivalent CONV Signals in the Non-Continuous Mode
CONV
DVALID
2
3
1
3
4
4
1
State
Integration
Status
mbsy
Int B
Int A
Int B
Side A
Data
Side B
Data
Side A
Data
Int A
Figure 17. Non-Continuous Mode Timing with a 50% Duty Cycle CONV Signal
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DDC114TH-7 | NPN PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114EK | NPN PRE-BIASED SMALL SIGNAL SOT-26 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114TH | NPN PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114TK | NPN PRE-BIASED SMALL SIGNAL SOT-26 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114YH | NPN PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDC114EH | 制造商:DIODES 制造商全稱:Diodes Incorporated 功能描述:NPN PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114EH-7 | 功能描述:開關(guān)晶體管 - 偏壓電阻器 150MW 10K RoHS:否 制造商:ON Semiconductor 配置: 晶體管極性:NPN/PNP 典型輸入電阻器: 典型電阻器比率: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 直流集電極/Base Gain hfe Min:200 mA 最大工作頻率: 集電極—發(fā)射極最大電壓 VCEO:50 V 集電極連續(xù)電流:150 mA 峰值直流集電極電流: 功率耗散:200 mW 最大工作溫度: 封裝:Reel |
| DDC114EH-7-F | 制造商:Diodes Incorporated 功能描述:TRANS DGTL BJT NPN 100MA 6PIN SOT-563 - Tape and Reel |
| DDC114EK | 制造商:DIODES 制造商全稱:Diodes Incorporated 功能描述:NPN PRE-BIASED SMALL SIGNAL SOT-26 DUAL SURFACE MOUNT TRANSISTOR |
| DDC114EK-7 | 制造商:Diodes Incorporated 功能描述:TRANS DGTL BJT NPN 100MA 6PIN SOT-26 - Tape and Reel |
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