參數(shù)資料
型號: DC1620A-G
廠商: Linear Technology
文件頁數(shù): 8/38頁
文件大?。?/td> 0K
描述: BOARD DEMO 125MSPS LTC2145-14
軟件下載: QuikEval II System
設(shè)計資源: DC1620A Design Files
DC1620A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: *
相關(guān)產(chǎn)品: DC890B-ND - BOARD USB DATA COLLECTION
LTC2145-14/
LTC2144-14/LTC2143-14
16
21454314fa
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
DNC (Pins 23, 24, 43, 44): Do not connect these pins.
D1_0_1/D1_0_1+ to D1_12_13/D1_12_13+ (Pins
45/46, 47/48, 49/50, 51/52, 53/54, 55/56, 57/58):
Channel 1 Double Data Rate Digital Outputs. Two data
bits are multiplexed onto each differential output pair.
The even data bits (D0, D2, D4, D6, D8, D10, D12) ap-
pear when CLKOUT+ is low. The odd data bits (D1, D3,
D5, D7, D9, D11, D13) appear when CLKOUT+ is high.
OF2_1/OF2_1+ (Pins 59/60):
Over/Underflow Digital
Output. OF2_1+ is high when an overflow or underflow
has occurred. The over/under flow for both channels
are multiplexed onto this pin. Channel 2 appears when
CLKOUT+ is low, and Channel 1 appears when CLKOUT+
is high.
DIFF
REF
AMP
REF
BUF
2.2μF
0.1μF
INTERNAL CLOCK SIGNALS
REFH
REFL
CLOCK/DUTY
CYCLE
CONTROL
RANGE
SELECT
1.25V
REFERENCE
ENC+
REFH
REFL
ENC
CORRECTION
LOGIC
SDO
CS
OGND
OF1
OVDD
D1_13
CLKOUT
CLKOUT+
D1_0
21454314 F01
SENSE
VREF
CH 1
ANALOG
INPUT
2.2μF
VCM1
0.1μF
VDD/2
OUTPUT
DRIVERS
MODE
CONTROL
REGISTERS
SCK
PAR/SER
SDI
GND
S/H
14-BIT
ADC CORE
CH 2
ANALOG
INPUT
S/H
14-BIT
ADC CORE
VCM2
0.1μF
OF2
D2_13
D2_0
VDD
PIN FUNCTIONS
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