參數(shù)資料
型號: DAC8574EVM
廠商: Texas Instruments, Inc.
英文描述: DAC8574 Evaluation Module(DAC8574評估板)
中文描述: DAC8574評估模塊(DAC8574評估板)
文件頁數(shù): 26/32頁
文件大?。?/td> 502K
代理商: DAC8574EVM
Factory Default Setting
3-2
3.1
Factory Default Setting
The EVM board is set to its default configuration from the factory as described
in Table 3-1 to operate in gain of 2 configuration (0 V to +10-V) mode of
operation.
Table 3-1.Factory Default Jumper Setting
Reference
Jumper
Position
1-2
Function
W1
Analog supply for the DAC8574 is +5VA.
W2
1-2
DAC output A (V
OUT
A) is routed to J4-2.
V
REF
H is not routed to the inverting input of the op amp.
Onboard external buffered reference U3 is routed to V
REF
H.
Negative supply rail of U2 op-amp is supplied with
V
SS
.
V
REF
L is tied to AGND.
A0 pin is tied to DGND.
W3
OPEN
W4
1-2
W5
1-2
W6
1-2
W7
CLOSE
W8
CLOSE
A1 pin is tied to DGND.
W9
CLOSE
A3 pin is tied to DGND.
W10
CLOSE
A2 pin is tied to DGND.
W11
1-2
DAC output B (V
OUT
B) is routed to J4-4.
DAC output C (V
OUT
C) is routed to J4-6.
DAC output D (V
OUT
D) is routed to J4-8.
Output op amp, U2, is configured for a gain of 2.
W12
1-2
W13
1-2
W15
CLOSE
J4
1-2
DAC output A (V
OUT
A) is connected to the noninverting input of the output op-amp, U2.
3.2
Host Processor Interface
The host processor basically drives the DAC, so the DAC
s proper operation
depends on the successful configuration between the host processor and the
EVM board. In addition, a properly written code is also required to operate the
DAC.
A custom cable can be made specific to the host interface platform. The EVM
allows interface to the host processor through J2 header connector for the
serial control signals and the serial data input. The output can be monitored
through the J4 header connector.
An interface adapter card is also available for the specific TI DSP starter kit as
well as an MSP430 based microprocessor as mentioned in chapter 1 of this
manual. Using the interface card alleviates the tedious task of building
customize cables and allows easy configuration of a simple evaluation
system.
The DAC8574 interfaces with any host processor capable of handling I
2
C
protocols or the popular TI DSP. For more information regarding the DAC8574
data interface, refer to the data sheet (SLAS377A).
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