參數(shù)資料
型號(hào)： DAC8571IDGKR
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： SERIAL INPUT LOADING, 13 us SETTLING TIME, 16-BIT DAC, PDSO8
封裝： GREEN, PLASTIC, MSOP-8
文件頁(yè)數(shù)： 7/30頁(yè)
文件大?。?/td> 825K
代理商： DAC8571IDGKR
www.ti.com
DAC8571
SLAS373A – DECEMBER 2002 – REVISED JULY 2003
Table 1. Master Transmitter Writing to Slave Receiver (DAC8571)
Standard/Fast Mode Write Sequence - Data Input
Transmitter
MSB
6
5
4
3
2
1
LSB
Comment
Master
Start
Begin sequence
Master
1
0
1
A0
0
R/W
Write addressing (LSB=0)
DAC8571
DAC8571 Acknowledges
Master
0
Load 1
Load 0
0
Brcsel
0
PD0
Control byte (PD0=0)
DAC8571
DAC8571 Acknowledges
Master
D15
D14
D13
D12
D11
D10
D9
D8
Writing dataword, high byte
DAC8571
DAC8571 Acknowledges
Master
D7
D6
D5
D4
D3
D2
D1
D0
Writing dataword, low byte
DAC8571
DAC8571 Acknowledges
Master
Stop or Repeated Start(1)(2)
Done
(1)
High byte, low byte sequence can repeat.
(2)
Use repeated start to secure bus operation and loop back to the stage of write addressing for next Write.
Standard/Fast Mode Write Sequence-Power Down Input
Transmitter
MSB
6
5
4
3
2
1
LSB
Comment
Master
Start
Begin sequence
Master
1
0
1
A0
0
R/W
Write addressing (LSB=0)
DAC8571
DAC8571 Acknowledges
Master
0
Load 1
Load 0
0
Brcsel
0
PD0
Control byte (PD0=1)
DAC8571
DAC8571 Acknowledges
Master
PD1
PD2
PD3
0
Writing dataword, high byte
DAC8571
DAC8571 Acknowledges
Master
0
Writing dataword, low byte
DAC8571
DAC8571 Acknowledges
Master
Stop or Repeated Start(1)(2)
Done
(1)
High byte, low byte sequence can repeat.
(2)
Use repeated start to secure bus operation and loop back to the stage of write addressing for next Write.
15
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