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參數(shù)資料
| 型號： | DAC8544I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUAD, 16-BIT, RAIL-TO-RAIL VOLTAGE OUTPUT, PARALLEL INTERFACE, DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 四，16位，軌到軌電壓輸出，并行接口，數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大小： | 476K |
| 代理商： | DAC8544I |
www.ti.com
THEORY OF OPERATION
D/A SECTION
The architecture of the DAC8544 consists of four string DACs followed by an output buffer amplifier. Figure 30
shows a block diagram of the DAC architecture.
_
+
Resistor String
V
REF
V
DAC Register
V
OUT
External Reference (–)
External Reference (+)
V
FB
R
R
V
REF
V
REF
D
65536
(1)
RESISTOR STRING
The resistor string section is shown in Figure 31. It is simply a divide-by-two resistor, followed by a string of
resistors, each of value R. The code loaded into the DAC register determines at which node on the string the
voltage is tapped off, to be fed into the output amplifier, by closing one of the switches connecting the string to
the amplifier. Because it is a string of resistors, it is assured monotonic.
V
REF+
To Output
Amplifier
R
R
R
R
V
REF–
OUTPUT AMPLIFIER
The output buffer is capable of generating rail-to-rail voltages at its output, which gives an output range of 0 V to
V
REF+
. It is capable of driving a load of 2 k
in parallel with 1000 pF to GND. The source and sink capabilities of
the output amplifier can be seen in the typical curves. The slew rate is 1 V/
μ
s with a full-scale settling time of 10
μ
s with the output loaded. The feedback and gain setting resistors of the amplifier are in the order of 50 k
. Their
absolute value can be off significantly, but they are matched to within 0.1%.
DAC8544
SLAS420–MAY 2004
Figure 30. DAC8544 Architecture
The input coding to the DAC8544 is unsigned binary, which gives the ideal output voltage as:
where
D = decimal equivalent of the binary code that is loaded to the DAC register; it can range from 0 to 65535.
Figure 31. Resistor String
The inverting input of the output amplifier is brought out to the V
FB
pin, through the feedback resistor. This allows
for better accuracy in critical applications by tying the V
FB
point and the amplifier output together at the load.
Other signal conditioning circuitry may also be connected between these points for specific applications including
current sourcing.
13
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| DAC8544IPFB | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Quad 16-Bit R-to-R Vltg Out Paral Intfc RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8544IPFBG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Quad 16-Bit R-to-R Vltg Out Paral Intfc RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8544IPFBR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Quad 16-Bit R-to-R Vltg Out Paral Intfc RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8544IPFBRG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Quad 16-Bit R-to-R Vltg Out Paral Intfc RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8550 | 制造商:BB 制造商全稱:BB 功能描述:16-BIT, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER |
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