參數(shù)資料
型號(hào)： DAC8532
英文描述： Dual Channel, Low Power, 16-Bit, Serial Input DIGITAL-TO-ANALOG CONVERTER
中文描述： 雙通道，低功耗，16位，串行輸入數(shù)字到模擬轉(zhuǎn)換器
文件頁(yè)數(shù)： 4/19頁(yè)
文件大小： 402K
代理商： DAC8532
DAC8532
SBAS246A
4
www.ti.com
SERIAL WRITE OPERATION
SCLK
1
24
SYNC
D
IN
DB23
DB0
DB23
t
8
t
3
t
2
t
7
t
4
t
5
t
6
t
1
t
9
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNITS
t
1(3)
SCLK Cycle Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
50
33
ns
ns
t
2
SCLK HIGH Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
13
13
ns
ns
t
3
SCLK LOW Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
22.5
13
ns
ns
t
4
SYNC to SCLK Rising
Edge Setup Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
0
0
ns
ns
t
5
Data Setup Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
5
5
ns
ns
t
6
Data Hold Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
4.5
4.5
ns
ns
t
7
24th SCLK Falling Edge to
SYNC Rising Edge
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
0
0
ns
ns
t
8
Minimum SYNC HIGH Time
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
50
33
ns
ns
t
9
24th SCLK Falling Edge to
SYNC Falling Edge
V
DD
= 2.7V to 5.5V
100
ns
NOTES: (1) All input signals are specified with t
= t
= 5ns (10% to 90% of V
) and timed from a voltage level of (V
+ V
IH
)/2. (2) See Serial Write Operation timing
diagram, below. (3) Maximum SCLK frequency is 30MHz at V
DD
= +3.6V to +5.5V and 20MHz at V
DD
= +2.7V to +3.6V.
TIMING CHARACTERISTICS
(1, 2)
V
DD
= +2.7V to +5.5V; all specifications
–
40
°
C to +105
°
C unless otherwise noted.
DAC8532
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