參數(shù)資料
型號(hào)： DAC8532
英文描述： Dual Channel, Low Power, 16-Bit, Serial Input DIGITAL-TO-ANALOG CONVERTER
中文描述： 雙通道，低功耗，16位，串行輸入數(shù)字到模擬轉(zhuǎn)換器
文件頁(yè)數(shù)： 13/19頁(yè)
文件大?。?/td> 402K
代理商： DAC8532
13
DAC8532
SBAS246A
www.ti.com
OPERATION EXAMPLES
Example 1: Write to Data Buffer A; Write to Data Buffer B; Load DACA and DACB Simultaneously
1st
—
Write to Data Buffer A:
2nd
—
Write to Data Buffer B and Load DAC A and DAC B simultaneously:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
0
0
X
0
0
0
D15
.....
D1
D0
The DACA and DACB analog outputs simultaneously settle to the specified values upon completion of the 2
nd
write sequence.
(The
“
Load
”
command moves the digital data from the data buffer to the DAC register at which time the conversion takes place
and the analog output is updated.
“
Completion
”
occurs on the 24
th
falling SCLK edge after SYNC LOW.)
Example 2: Load New Data to DACA and DACB Sequentially
1st
—
Write to Data Buffer A and Load DAC A: DACA output settles to specified value on completion:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
1
1
X
1
0
0
D15
.....
D1
D0
2nd
—
Write to Data Buffer B and Load DAC B: DACB output settles to specified value on completion:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
0
1
X
0
0
0
D15
.....
D1
D0
After completion of the 1
st
write cycle, the DACA analog output settles to the voltage specified; upon completion of write cycle 2,
the DACB analog output settles.
Example 3: Power-Down DACA to 1k
and Power-Down DACB to 100k
Simultaneously
1st
—
Write power-down command to Data Buffer A:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
1
0
X
1
0
0
D15
.....
D1
D0
2nd
—
Write power-down command to Data Buffer B and Load DACA and DACB simultaneously:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
0
0
X
0
0
1
Don
’
t Care
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
1
1
X
1
1
0
Don
’
t Care
The DACA and DACB analog outputs simultaneously power-down to each respective specified mode upon completion of the
2
nd
write sequence.
Example 4: Power-Down DACA and DACB to High Impedance Sequentially:
1st
—
Write power-down command to Data Buffer A and Load DAC A: DAC A output = High-Z:
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
0
1
X
0
1
1
Don
’
t Care
Reserved
Reserved
LDB
LDA
DC
Buffer Select
PD1
PD0
DB15
......
DB1
DB0
0
0
1
0
X
1
1
1
Don
’
t Care
2nd
—
Write power-down command to Data Buffer B and Load DAC B: DAC B output = High-Z:
The DACA and DACB analog outputs sequentially power-down to high impedance upon completion of the 1
st
and 2
nd
write
sequences, respectively.
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