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參數(shù)資料
| 型號： | DAC8420QBC |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Quad 12-Bit Serial Voltage Output DAC |
| 中文描述： | QUAD, SERIAL INPUT LOADING, 13 us SETTLING TIME, 12-BIT DAC, UUC16 |
| 封裝： | 0.119 X 0.283 INCH, DIE-16 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 587K |
| 代理商： | DAC8420QBC |
DAC8420
REV. 0
–9–
0.2
–0.6
125
–0.4
–0.5
–50
–75
–0.2
–0.3
–0.1
0
0.1
100
75
50
25
0
–25
TEMPERATURE –
°
C
F
DAC A
DAC D
DAC C
DAC B
V
DD
= +15V, V
SS
= –15V
V
VREFHI
= +10V
V
VREFLO
= –10V
Figure 8. Full-Scale Error vs.
Temperature
1.2
–0.4
125
0
–0.2
–50
–75
0.4
0.2
0.6
0.8
1.0
100
75
50
25
0
–25
TEMPERATURE –
°
C
Z
V
DD
= +15V, V
SS
= –15V
V
VREFHI
= +10V
V
VREFLO
= –10V
DAC C
DAC B
DAC D
DAC A
Figure 9. Zero-Scale Error vs.
Temperature
0.9
–0.9
4500
–0.5
–0.7
500
0
–0.1
–0.3
0.1
0.3
0.5
0.7
4000
3500
3000
2500
2000
1500
1000
T
A
= +25°C
V
DD
= +15V, V
SS
= –15V
V
VREFHI
= +10V
V
VREFLO
= –10V
DIGITAL INPUT CODE
E
Figure 10. Channel-to-Channel
Matching
±
15/
±
10
+1.5
–1.0
+0.5
–0.5
500
0
0
+1.0
4000
3500
3000
2500
2000
1500
DIGITAL INPUT CODE
1000
I
V
T
A
= +25°C
V
DD
= +15V, V
SS
= –15V
V
VREFHI
= +10V
V
VREFLO
= –10V
Figure 14. I
VREFHI
vs. Code
6.5mV
CLR
–3.5mV
+45.1μs
–4.9μs
+5μs/DIV
t
SETT
ˉ 8μs
–1.22mV
0mV
1 LSB
T
A
= +25°C
V
DD
= +5V, V
SS
= –5V
V
VREFHI
= +2.5V
V
VREFLO
= –2.5V
Figure 16. Settling Time (–)(
±
5 V)
–250μV
–10.25mV
45.1μs
–4.9μs
5μs/DIV
LD
t
SETT
ˉ 8μs
1.22mV
1 LSB
0mV
T
A
= +25°C
V
DD
= +5V, V
SS
= –5V
V
VREFHI
= +2.5V
V
VREFLO
= –2.5V
Figure 15. Settling Time (+)(
±
5 V)
–0.5
–1.5
500
–1.0
0
+1.0
0
+0.5
4000
3500
3000
2500
2000
1500
DIGITAL INPUT CODE
1000
+1.5
T
A
= +25°C
V
DD
= +5V, V
SS
= 0V
V
VREFHI
= +2.5V
V
VREFLO
= 0V
E
4500
Figure 11. Channel-to-Channel
Matching +5/+2.5
+0.8
+0.7
–0.2
–0.3
–0.4
500
0
+0.1
–0.1
0
+0.2
+0.3
+0.4
+0.6
+0.5
3500 4000
3000
2500
2000
1500
DIGITAL INPUT CODE
1000
T
A
= +25, –55, 125°C
V
DD
= +15V, V
SS
= –15V
V
VREFHI
= +10V
V
VREFLO
= –10V
I
4500
Figure 13. INL vs. Code
±
15/
±
10
13
4
–7
13
6
5
–5
8
7
9
10
11
12
11
9
7
5
3
1
V
VREFHI
– V
–1
–3
0
I
D
T
A
= +25°C
V
DD
= +15V, V
SS
= –15V
V
VREFLO
= –10V
Figure 12. I
DD
vs. V
VREFHI
, All
DACs HIGH
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