參數(shù)資料
型號(hào): DAC8420QBC
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Quad 12-Bit Serial Voltage Output DAC
中文描述: QUAD, SERIAL INPUT LOADING, 13 us SETTLING TIME, 12-BIT DAC, UUC16
封裝: 0.119 X 0.283 INCH, DIE-16
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 587K
代理商: DAC8420QBC
DAC8420
REV. 0
–13–
For a single 5 V supply, V
VREFHI
is limited to at most 2.5 V, and
must always be at least 2.5 V less than the positive supply to
ensure linearity of the device. For these applications, the REF43
is an excellent low drift 2.5 V reference that consumes only
450
μ
A (max). It works well with the DAC8420 in a single 5 V
system as shown in Figure 29.
DAC-8420
DIGITAL
CONTROL
4
9
15 16
14
12
11
10
8
2
3
6
7
1
5
DAC A
DAC B
DAC C
DAC D
VOUTA
VOUTB
VOUTC
VOUTD
DIGITAL INPUTS
GND
VREFLO
0.1μF
+5V SUPPLY
VREFHI
REF-43
VIN
VOUT
GND
+5V SUPPLY
2.5V
0.1μF
6
2
4
Figure 29. +5 V Single Supply Operation Using REF43
Isolated Digital Interface
Because the DAC8420 is ideal for generating accurate voltages
in process control and industrial applications, due to noise,
safety requirements, or distance, it may be necessary to isolate it
from the central controller. This can be easily achieved by using
opto-isolators, which are commonly used to provide electrical
isolation in excess of 3 kV. Figure 30 shows a simple 3-wire
interface scheme to control the clock, data, and load pulse. For
normal operation,
CS
is tied permanently LOW so that the
DAC8420 is always selected. The resistor and capacitor on the
CLR
pin provide a power-on reset with 10 ms time constant. The
three opto-isolators are used for the SDI, CLK, and
LD
lines.
One opto-isolated line (
LD
) can be eliminated from this circuit
by adding an inexpensive 4-bit TTL Counter to generate the
Load pulse for the DAC8420 after 16 clock cycles. The counter
is used to count of the number of clock cycles loading serial data
to the DAC8420. After all 16 bits have been clocked into the
converter, the counter resets, and a load pulse is generated on
clock 17. In either circuit, the DAC8420’s serial interface pro-
vides a simple, low cost method of isolating the digital control.
10k
10k
+5V
10k
LD
SCLK
SDI
+5V
REG
+5V
POWER
HIGH VOLTAGE
ISOLATION
+5V
+5V
0.1μF
+5V
CLR
CLSEL
CLK
SDI
VREFLO VSS GND
LD
CS
4
5
VREFHI
1μF
10k
DAC-8420
VOUTA
VOUTB
VOUTC
VOUTD
REF-43
VOUT
GND
VIN
+5V
6
2
4
2.5V
9
8
1
6
7
3
2
11
10
14
16
15
12
VDD
Figure 30. Opto-lsolated 3-Wire Interface
Dual Window Comparator
Often a comparator is needed to signal an out-of-range warning.
Combining the DAC8420 with a quad comparator such as the
CMP04 provides a simple dual window comparator with adjust-
able trip points as shown in Figure 31. This circuit can be
operated with either a dual or a single supply. For the A input
channel, DAC B sets the low trip point and DAC A sets the up-
per trip point. The CMP04 has open-collector outputs that are
connected together in “Wired-OR” configuration to generate an
out-of-range signal. For example, when VINA goes below the
trip point set by DAC B, comparator C2 pulls the output down,
turning the red LED on. The output can also be used as a logic
signal for further processing.
相關(guān)PDF資料
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