參數(shù)資料
型號(hào): DAC8248HS
廠商: PRECISION MONOLITHICS INC
元件分類(lèi): DAC
英文描述: Dual 12-Bit 8-Bit Byte Double-Buffered CMOS D/A Converter
中文描述: 12-BIT DAC, PDSO24
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 350K
代理商: DAC8248HS
DAC8248
–5–
REV. B
1
1. AGND
1
2. I
OUTA
1
3. R
FB A
1
4. V
REF A
1
5. DGND
1
6. DB7(MSB)
1
7. DB6
1
8. DB5
1
9. DB4
10. DB3
11. DB2
12. NC
13. NC
14. DB1
15. DB0(LSB)
16.
RESET
17.
LSB
/MSB
18.
DAC A
/DAC B
19.
LDAC
20.
WR
21. V
DD
22. V
REF B
23. R
FB B
24. I
OUT B
SUBSTRATE (DIE BACKSIDE) IS INTERNALLY
CONNECTED TO V
DD
.
DICE CHARACT E RIST ICS
WAFER TEST LIMTS
@ V
DD
= +5 V or +15 V, V
REF A
= V
REF B
= +10 V, V
OUT A
= V
OUT B
= 0 V; AGND = DGND = 0 V; T
A
= 25
8
C.
DAC8248G
Limit
Parameter
Symbol
Conditions
Units
Relative Accuracy
Differential Nonlinearity
Full-Scale Gain Error
1
Output Leakage
(I
OUT A
, I
OUT B
)
Input Resistance
(V
REF A
, V
REF B
)
V
REF A
, V
REF B
Input
Resistance Match
Digital Input High
INL
DNL
G
FSE
Endpoint Linearity Error
All Grades are Guaranteed Monotonic
Digital Inputs = 1111 1111 1111
Digital Inputs = 0000 0000 0000
Pads 2 and 24
±
1
±
1
±
4
LSB max
LSB max
LSB max
I
LK G
±
50
nA max
R
REF
R
REF
R
REF
V
INH
Pads 4 and 22
8/15
k
min/k
max
±
1
2.4
13.5
0.8
1.5
±
1
2
0.1
% max
V min
V min
V max
V max
μ
A max
mA max
mA max
V
DD
= +5 V
V
DD
= +15 V
V
DD
= +5 V
V
DD
= +15 V
V
IN
= 0 V or V
DD
; V
INL
or V
INH
All Digital Inputs V
INL
or V
INH
All Digital Inputs 0 V or V
DD
Digital Input Low
V
INL
Digital Input Current
Supply Current
I
IN
I
DD
DC Supply Rejection
(
Gain/
V
DD
)
PSR
V
DD
=
±
5%
0.002
%/% max
NOT ES
1
Measured using internal R
FB A
and R
FB B
.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
Die Size 0.124
×
0.132 inch, 16,368 sq. mils
(3.15
×
3.55 mm, 10.56 sq. mm)
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