參數(shù)資料
型號： DAC8143FP
廠商： PRECISION MONOLITHICS INC
元件分類： DAC
英文描述： 12-Bit Serial Daisy-Chain CMOS D/A Converter
中文描述： 12-BIT DAC, PDIP16
文件頁數(shù)： 9/12頁
文件大小： 181K
代理商： DAC8143FP
DAC8143
–9–
REV. C
Table I. Truth Table
DAC8143 Logic Inputs
Input Register/
Digital Output
STB
4
STB
3
Control Inputs
STB
2
DAC Register
CLR
Control Inputs
LD
2
STB
1
LD
1
DAC8143 Operation
Notes
0
0
0
g
1
1
f
1
0
g
0
0
g
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
Serial Data Bit Loaded from SRI
into Input Register and Digital Output
(SRO Pin) after 12 Clocked Bits.
2, 3
1
X
X
X
X
0
X
X
X
X
1
X
X
X
X
1
No Operation (Input Register and SRO)
3
Reset DAC Register to Zero Code
(Code: 0000 0000 0000)
(Asynchronous Operation)
0
X
X
1, 3
1
1
1
X
X
1
No Operation (DAC Register and SRO)
3
1
0
0
Load DAC Register with the Contents
of Input Register
3
NOTES
1
CLR
= 0 asynchronously resets DAC Register to 0000 0000 0000, but has no effect on Input Register.
2
Serial data is loaded into Input Register MSB first, on edges shown.
g
is positive edge,
f
is negative edge.
3
0 = Logic LOW, 1 = Logic HIGH, X = Don’t Care.
APPLICATIONS INFORMATION
UNIPOLAR OPERATION (2-QUADRANT)
The circuit shown in Figures 16 and 17 may be used with an ac
or dc reference voltage. The circuit’s output will range between
0 V and +10(4095/4096) V depending upon the digital input
code. The relationship between the digital input and the analog
output is shown in Table II. The V
REF
voltage range is the maxi-
mum input voltage range of the op amp or
±
25 V, whichever is
lowest.
Table II. Unipolar Code Table
Digital Input
Nominal Analog Output
(V
OUT
as Shown
in Figures 16 and 17)
–
V
REF
4096
2048
4096
2047
4096
1
4096
0
4096
MSB
LSB
1 1 1 1 1 1 1 1 1 1 1 1
–
V
REF
4095
4096
2049
1 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0 0 0 0 0
–
V
REF
= –
V
REF
2
0 1 1 1 1 1 1 1 1 1 1 1
–
V
REF
0 0 0 0 0 0 0 0 0 0 0 1
–
V
REF
0 0 0 0 0 0 0 0 0 0 0 0
–
V
REF
= 0
NOTES
1
Nominal full scale for the circuits of Figures 16 and 17 is given by
4095
4096
2
Nominal LSB magnitude for the circuits of Figures 16 and 17 is given by
1
4096
FS
= –
V
REF
.
LSB
=
V
REF
or
V
REF
(2
–
n
).
OP-77
+5V
V
REF
15
13
V
DD
R
FEEDBACK
I
OUT1
I
OUT2
AGND
DGND
SRO
(BUFFERED
DIGITAL
DATA OUT)
15pF
+15V
–15V
V
OUT
7
6
4
3
2
14
4, 5
8–11
7
1
2
3
6
12
DAC8143
CONTROL
INPUTS
SRI
(SERIAL
DATA IN)
V
REF
–10V
CLR
Figure 16. Unipolar Operation with High Accuracy Op
Amp (2-Quadrant)
OP-42
+5V
V
REF
V
DD
R
FEEDBACK
I
OUT1
I
OUT2
AGND
DGND
SRO
(BUFFERED
DIGITAL
DATA OUT)
15pF
+15V
–15V
V
OUT
7
6
4
3
2
15
14
13
4, 5
8–11
7
1
2
3
6
12
DAC8143
CONTROL
INPUTS
SRI
(SERIAL
DATA IN)
V
–10V
R2
50
V
R1
100
V
CLR
Figure 17. Unipolar Operation with Fast Op Amp and
Gain Error Trimming (2-Quadrant)
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