參數(shù)資料
型號(hào)： DAC709SH
英文描述： Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS
中文描述： 微處理器兼容的16位數(shù)字到模擬轉(zhuǎn)換器
文件頁(yè)數(shù)： 5/11頁(yè)
文件大小： 149K
代理商： DAC709SH
5
DAC707/708/709
DESCRIPTION OF PIN FUNCTIONS
DAC707
Pin
DAC708/709
DESIGNATOR
DESCRIPTION
#
DESIGNATOR
DESCRIPTION
V
OUT
V
DD
Voltage output for DAC707 (
±
10V)
Logic supply (+5V)
1
A
2
A
0
Latch enable for D/A latch (Active low)
2
Latch enable for “l(fā)ow byte” input (Active low). When
both A
and A
are logic “0”, the serial input mode is
selected and the serial input is enabled.
DCOM
Digital common
3
A
1
Latch enable for “high byte” input (Active low). When
both A
and A
are logic “0”, the serial input mode is
selected and the serial input is enabled.
ACOM
Analog common
4
D7 (D15)
Input for data bit 7 if enabling low byte (LB) latch or
data bit 15 if enabling the high byte (HB) latch.
SJ
Summing junction of the internal output op amp for the
DAC707. Offset adjust circuit is connected to the
summing junction of the output amplifier. Refer to Block
Diagram.
5
D6 (D14)
Input for data bit 6 if enabling LB latch or data bit 14 if
enabling the HB latch.
GA
Gain adjust pin. Refer to Connection Diagram for gain
adjust circuit.
6
D5 (D13)
Data bit 5 (LB) or data bit 13 (HB)
+V
CC
–V
CC
CLR
Positive supply voltage (+15V)
7
D4 (D12)
Data bit 4 (LB) or data bit 12 (HB)
Negative supply voltage (–15V)
8
D3 (D11)
Data bit 3 (LB) or data bit 11 (HB)
Clear line. Sets the input latch to zero and sets the D/A
latch to the input code that gives bipolar zero on the
D/A output (Active low)
9
D2 (D10)
Data bit 2 (LB) or data bit 10 (HB)
WR
Write control line (Active low)
10
D1 (D9)
Data bit 1 (LB) or data bit 9 (HB)
A
1
Enable for D/A converter latch (Active low)
11
D0 (D8)/SI
Data bit 0 (LB) or data bit 8 (HB). Serial input when
serial mode is selected.
A
0
D15 (MSB)
Enable for input latch (Active low)
12
DCOM
Digital common
Data bit 15 (Most Significant Bit)
13
R
F2
Feedback resistor for internal or external operational
amplifier. Connect to pin 14 when a 10V output range
is desired. Leave open for a 20V output range.
D14
Data bit 14
14
V
OUT
R
F1
(DAC708)
Voltage output for DAC709 or feedback resistor for
use with an external output op amp for the DAC708.
Refer to Connection Diagram for connection of
external op amp to DAC708.
D13
Data bit 13
15
ACOM
Analog common
D12
Data bit 12
16
SJ (DAC709)
I
OUT
(DAC708)
Summing junction of the internal output op amp for the
DAC709, or the current output for the DAC708. Refer
to Connection Diagram for connection of external op
amp to DAC708.
D11
Data bit 11
17
BPO
Bipolar offset. Connect to pin 16 when operating in the
bipolar mode. Leave open for unipolar mode.
D10
Data bit 10
18
GA
Gain adjust pin
D9
Data bit 9
19
+V
CC
–V
CC
CLR
Positive supply voltage (+15V)
D8
Data bit 8
20
Negative supply voltage (–15V)
D7
Data bit 7
21
Clear line. Sets the high and low byte input registers
to zero and, for bipolar operation, sets the D/A register
to the input code that gives bipolar zero on the D/A
output. (In the unipolar mode, invert the MSB prior to
the D/A.)
D6
Data bit 6
22
WR
Write control line
D5
Data bit 5
23
CS
Chip select control line
D4
Data bit 4
24
V
DD
No pin
Logic supply (+5V)
D3
Data bit 3
25
D2
Data bit 2
26
No pin
(The DAC708 and DAC709 are in 24-pin packages)
D1
Data bit 1
27
No pin
D0 (LSB)
Data bit 0 (Least Significant Bit)
28
No pin
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