參數(shù)資料
型號: DAC707KP
英文描述: Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS
中文描述: 微處理器兼容的16位數(shù)字到模擬轉(zhuǎn)換器
文件頁數(shù): 7/11頁
文件大小: 149K
代理商: DAC707KP
7
DAC707/708/709
output. It is defined as a percent of FSR change in the output
per percent of change in either the positive supply (+V
),
negative supply (–V
) or logic supply (V
) about the
nominal power supply voltages (see Figure 2). It is specified
for DC or low frequency changes. The typical performance
curve in Figure 2 shows the effect of high frequency changes
in power supply voltages.
Zero Adjustment
For unipolar (USB) configurations, apply the digital input
code that produces zero voltage or zero current output and
adjust the zero potentiometer for zero output.
For bipolar (BTC) configurations, apply the digital input
code that produces zero output voltage or current. See Table
II for corresponding codes and connection diagrams for zero
adjustments circuit connections. Zero calibration should be
made before gain calibration.
Gain Adjustment
Apply the digital input that gives the maximum positive
output voltage. Adjust the gain potentiometer for this posi-
tive full-scale voltage. See Table II for positive full-scale
voltages and the Connection Diagrams for gain adjustment
circuit connections.
FIGURE 2. Power Supply Rejection Versus Power Supply
Ripple Frequency.
OPERATING INSTRUCTIONS
POWER SUPPLY CONNECTIONS
For optimum performance and noise rejection, power supply
decoupling capacitors should be added as shown in the
Connection Diagram. 1
μ
F tantalum capacitors should be
located close to the D/A converter.
EXTERNAL ZERO AND GAIN ADJUSTMENT
Zero and gain may be trimmed by installing external zero
and gain potentiometers. Connect these potentiometers as
shown in the Connection Diagram and adjust as described
below. TCR of the potentiometers should be 100ppm/
°
C or
less. The 3.9M
and 270k
resistors (
±
20% carbon or
better) should be located close to the D/A converter to
prevent noise pickup. If it is not convenient to use these
high-value resistors, an equivalent “T” network, as shown in
Figure 3, may be substituted in place of the 3.9M
resistor.
A 0.001
μ
F to 0.01
μ
F ceramic capacitor should be connected
from GAIN ADJUST to ANALOG COMMON to prevent
noise pickup. Refer to Figures 4 and 5 for the relationship of
zero and gain adjustments to unipolar D/A converters.
FIGURE 3. Equivalent Resistances.
3.9M
180k
180k
10k
+ Full Scale
Input =
0000
1LSB
Range of
Zero
Adjust
Zero Adjust Translates the Line
Digital Input
Input = FFFF
Range of
Gain Adjust
A
Gain Adjust
Rotates the Line
F
H
H
FIGURE 4. Relationship of Zero and Gain Adjustments for
Unipolar D/A Converters, DAC708 and
DAC709.
FIGURE 5. Relationship of Zero and Gain Adjustments for
Bipolar D/A Converters, DAC707 and DAC708/
709
+ Full Scale
1LSB
Digital Input
Full Scale
Range
Gain Adjust
Rotates
the Line
– Full Scale
Input = 0000
Range of
Gain Adjust
H
Input = 7FFF
H
Input = 8000
H
Offset Adjust
Translates
the Line
Range and
Offset Adjust
A
Power Supply Ripple Frequency (Hz)
%
0.030
0.025
0.020
0.015
0.010
0.005
0
1
10
100
1k
10k
100k
+15V
Supply
S
+5V
Supply
–15V Supply
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