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參數(shù)資料
| 型號： | DAC4813JP |
| 英文描述： | QUAD 12-BIT DIGITAL-TO-ANALOG CONVERTER 12-bit port interface |
| 中文描述： | 四核12位數(shù)字至模擬轉(zhuǎn)換器12位端口接口 |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 213K |
| 代理商： | DAC4813JP |
DAC4813
8
INTERNAL/EXTERNAL REFERENCE USE
DAC4813 contains a +10V
±
50mV voltage reference,
V
. V
is available to drive external loads sourcing
up to 2mA. The load current should be constant, otherwise
the gain (and bipolar offset, if connected) of the D/A
converters will vary.
Because of the lack of additional pins required for external
reference inputs, V
REF OUT
is connected internally to all 4
D/A converters. V
REF OUT
is available for external use on pin
28.
GAIN AND OFFSET ADJUSTMENTS
DAC4813 has no Gain and Offset Adjustment option.
INSTALLATION
POWER SUPPLY CONNECTIONS
Power supply decoupling capacitors should be added. Best
settling time performance occurs using a 1 to 10
μ
F tantalum
capacitor at –V
. Applications with less critical settling
time may be ale to use 0.01
μ
F at –V
as well as at +V
CC
.
The capacitors should be located close to the package.
DAC4813 features separate digital and analog power supply
returns to permit optimum connections for low noise and
high speed performance. It is recommended that both DIGI-
TAL COMMON (DCOM) and ANALOG COMMON
(ACOM) be connected directly to a ground plane under the
package. If a ground place is not used, connect the ACOM
and DCOM pins together close to the package. Since the
reference point for V
and V
is the ACOM pin, it is
also important to connect the load directly to the ACOM pin.
The change in current in the ACOM pin due to an input date
word change from 000
HEX
to FFF
HEX
is only 1mA for each
D/A converter.
OUTPUT VOLTAGE SWING
AND RANGE CONNECTIONS
DAC4813 output amplifiers provide a
±
10V output swing
while operating on supplies as low as
±
12V
±
5%.
DAC4813 is fully committed to
±
10V output ranges. Op-
tional ranges are not pin programmable.
12- AND 16-BIT BUS INTERFACES
DAC4813 data is latched into the input latches of each D/A
by asserting low each ENx individually and transferring the
data from the bus to each input latch by asserting WR low.
All D/A outputs in each package are then updated simulta-
neously by asserting LDAC and WR low.
Be sure to read the CAUTION statement in the LOGIC
INPUT COMPATIBILITY section.
RESET FUNCTION
The Reset function resets only the D/A latch. Therefore,
after a RESET, good data must be written to
all
the input
latches before an LDAC – WR command is issued. Other-
wise, old data or unknown data is present in the input latches
and will be transferred to the D/A latch producing an analog
output value that may be unwanted.
LOGIC INPUT COMPATIBILITY
DAC4813 digital inputs are TTL compatible (1.4V switch-
ing level) over the operating range of +V
. Each input has
low leakage and high input impedance. Thus the inputs are
suitable for being driven by any type of 5V logic. An
equivalent circuit of a digital input is shown in Figure 1.
Open DATA input lines will float to 7V or more. Although
this will not harm the DAC4813, current spikes will occur in
the input lines when a logic 0 is asserted and, in addition, the
speed of the interface will be slower. A digital output driving
a DATA input line of the DAC4813 must not drive,
or let
the DATA input float
, above +5.5V. Unused DATA inputs
should be connected to DCOM.
Unused control inputs should be connected to a voltage
greater than +2V but not greater than +5.5V. If this voltage
is not available, the control inputs can be connected to +V
CC
through a 100k
resistor to limit the input current.
FIGURE 1. Equivalent Digital Input Circuit.
6.8V
10
to
20pF
Digital
Input
DCOM
I
I
R
DAC4813
R
250
330
DIGITAL INPUT
Data, LDAC, WR, RESET
EN
X
INPUT CODING
DAC4813 accepts positive-true binary input codes.
Input coding for bipolar analog outputs is Bipolar Offset
Binary (BOB), where an input code of 000
gives a minus
full-scale output, an input of FFF
gives an output 1LSB
below positive full scale, and zero occurs for an input code
of 800
HEX
.
DAC4813 can be used with two's complement coding if a
logic inverter is used ahead of the MSB input (DB11).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC4814 | Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4814AP | Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4814BP | Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4815 | Quad 12-Bit Digital-to-Analog Converter 8-Bit Port Interface |
| DAC4815AP | Quad 12-Bit Digital-to-Analog Converter 8-Bit Port Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC4814 | 制造商:BB 制造商全稱:BB 功能描述:Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4814AP | 制造商:BB 制造商全稱:BB 功能描述:Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4814BP | 制造商:BB 制造商全稱:BB 功能描述:Quad 12-Bit Digital-to-Analog Converter Serial Interface |
| DAC4815 | 制造商:BB 制造商全稱:BB 功能描述:Quad 12-Bit Digital-to-Analog Converter 8-Bit Port Interface |
| DAC4815AP | 制造商:BB 制造商全稱:BB 功能描述:Quad 12-Bit Digital-to-Analog Converter 8-Bit Port Interface |
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