參數(shù)資料
型號: DAC1208D750HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
中文描述: SERIAL INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù): 56/98頁
文件大?。?/td> 554K
代理商: DAC1208D750HN
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10.15.2.7
Page 4 allocation map description
D
A
P
R
5
N
D
2
×
,
×
×
Table 78.
Address Register name
Page 4 register allocation map
R/W Bit definition
b7
R/W
SR_SWA_
Default
Bin
b6
SR_SWA_
LN2
SR_CNTRL
_LN2
FORCE_
LOCK_LN2
MAN_LOCK_LN1[3:0]
b5
b4
b3
SR_CA_LN3 SR_CA_LN2 SR_CA_LN1 SR_CA_LN0 00000000 00h
b2
b1
b0
Hex
0
00h
SR_DLP_0
LN3
SR_SWA_
LN1
SR_CNTRL_
LN1
FORCE_
LOCK_LN1
SR_SWA_
LN0
SR_CNTRL_
LN0
FORCE_
LOCK_LN0
1
01h
SR_DLP_1
R/W SR_CNTRL
_LN3
FORCE_
LOCK_LN3
SR_DEC_
LN3
-
SR_DEC_
LN2
-
SR_DEC_
LN1
-
SR_DEC_
LN0
SR_ILA
00000000 00h
2
02h
FORCE_LOCK
R/W
00000000 00h
3
03h
MAN_LOCK_
LN_1_0
MAN_LOCK_2_0 R/W
CA_CNTRL
R/W
MAN_LOCK_LN0[3:0]
00000000 00h
4
5
04h
05h
MAN_LOCK_LN3[3:0]
WORD_
SWAP_LN2
MAN_SCR_
LN2
SEL_ILA[1:0]
MAN_LOCK_LN2[3:0]
SELECT_RF
_F10_LN2
FORCE_
SCR_LN2
00000000 00h
00000000 00h
R/W
WORD_
SWAP_LN3
MAN_SCR
_LN3
SEL_421_
211
-
WORD_
SWAP_LN1
MAN_SCR_
LN1
WORD_
SWAP_LN0
MAN_SCR_
LN0
SELECT_RF
_F10_LN3
FORCE_
SCR_LN3
SEL_LOCK[2:0]
SELECT_RF
_F10_LN1
FORCE_
SCR_LN1
SUP_LANE_
SYN
DYN_ALIGN
_ENA
SELECT_RF
_F10_LN0
FORCE_
SCR_LN0
EN_SCR
6
06h
SCR-CNTRL
R/W
00000000 00h
7
07h
ILA_CNTRL
R/W
10000011 83h
8
08h
FORCE_ALIGN
R/W
-
-
-
-
-
FORCE_
ALIGN
00000000 00h
9
09h
MAN_ALIGN_
LN_0_1
0Ah MAN_ALIGN_
LN_2_3
0Bh FA_ERR_
HANDLING
0Ch SYNCOUT_
MODE
0Dh LANE_
POLARITY
0Eh LANE_SELECT
10h
SOFT_RESET_
SCRAMBLER
11h
INIT_SCR_S15T8
_LN0
R/W
MAN_ALIGN_LN1[3:0]
MAN_ALIGN_LN0[3:0]
00000000 00h
10
R/W
MAN_ALIGN_LN3[3:0]
MAN_ALIGN_LN2[3:0]
00000000 00h
11
R/W
SEL_KOUT_UNEXP_
LN23[1:0]
SEL_RE_INIT[2:0]
SEL_KOUT_UNEXP_
LN10[1:0]
SEL_NIT_ERR_LN23[1:0] SEL_NIT_ERR_LN10[1:0] 00000000 00h
12
R/W
SYNC_POL
SEL_SYNC[3:0]
00000000 00h
13
R/W
-
-
-
-
POL_LN3
POL_LN2
POL_LN1
POL_LN0
00000000 00h
14
16
R/W
R/W
LANE_SEL_LN3[1:0]
-
LANE_SEL_LN2[1:0]
-
LANE_SEL_LN1[1:0]
SR_SCR_
LN3
LANE_SEL_LN0[1:0]
SR_SCR_
LN1
11100100 E4h
00000000 00h
-
-
SR_SCR_
LN2
SR_SCR_
LN0
17
R/W
INIT_VALUE_S15_S8_LN0[7:0]
00000000 00h
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PDF描述
DAC1208D750HN Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
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