參數(shù)資料
型號(hào): DAC1002LJ
英文描述: 10-Bit Digital-to-Analog Converter
中文描述: 10位數(shù)字到模擬轉(zhuǎn)換器
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 262K
代理商: DAC1002LJ
Timing Diagrams (Continued)
TLH11437 – 12
DACs are written to MSB first
DAC1 is written to first then DACs 2 3 and 4
FIGURE 2 Write to All DACs with Update of Outputs (AU e 1) 10 MHz Maximum CLK Rate
TLH11437 – 13
FIGURE 3 Read One DAC DO LSB First DO Changes on Falling Edge of CLK (AU e 1) 5 MHz Maximum CLK Rate
TLH11437 – 14
DAC1 is read first then DACs 2 3 and 4
FIGURE 4 Read All DACs DO LSB First DO Changes on Falling Edge of CLK (AU e 1) 5 MHz Maximum CLK Rate
7
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