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參數(shù)資料
| 型號： | D2-45157-QR |
| 廠商： | Intersil |
| 文件頁數(shù)： | 3/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL AMP PWM CTRLR 68QFN |
| 標(biāo)準(zhǔn)包裝： | 30 |
| 系列： | D2Audio™ |
| 類型： | D 類 |
| 輸出類型： | 2 通道（立體聲） |
| 在某負(fù)載時最大輸出功率 x 通道數(shù)量： | 30W x 2 @ 8 歐姆 |
| 電源電壓： | 9 V ~ 26 V |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 68-QFN 裸露焊盤（10x10） |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 包裝： | 管件 |
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D2-45057, D2-45157
11
FN6785.0
July 29, 2010
24
nERROR/
CFG0
I/O
3.3
Output configuration selection input, and nERROR output. Upon device reset, pin operates
as input, using application-installed pull-up or pull-down connection to pin to specify one of
4 amplifier configurations. Upon internal D2-45057, D2-45157 firmware execution, pin
becomes output, providing active-low output drive when amplifier protection monitoring
detects an error condition. When operating as output, provides 4mA drive strength. (Note:
This pin may also be referenced as “PSCURR” on some reference designs. Function is
identical regardless of name.)
25
PSSYNC/
CFG1
I/O
3.3
Output configuration selection input, and power supply sync output. Upon device reset, pin
operates as input, using application-installed pull-up or pull-down connection to pin to
specify one of 4 amplifier configurations. Upon internal D2-45057, D2-45157 firmware
execution, pin becomes output, providing synchronizing signal to on-board power supply
circuits. When operating as output, provides 4mA drive strength. Note: This pin may also
be referenced as “PSTEMP” on some reference designs. Function is identical regardless of
name.
26 PROTECT0
I/O
3.3
PWM protection input. Input has hysteresis. Protection monitoring functionality of pin is
controlled by internal D2-45057, D2-45157 firmware, and dependent on which of the 4
amplifier configurations is enabled.
27 PROTECT1
I/O
3.3
PWM protection input. Input has hysteresis. Protection monitoring functionality of pin is
controlled by internal D2-45057, D2-45157 firmware, and dependent on which of the 4
amplifier configurations is enabled.
28 PROTECT2
I/O
3.3
PWM protection input. Input has hysteresis. Protection monitoring functionality of pin is
controlled by internal D2-45057, D2-45157 firmware, and dependent on which of the 4
amplifier configurations is enabled.
29
nERROR0
O
3.3
Overcurrent protection output, channel A output stage. Open drain 16mA driver, with internal
100kΩ (approx.) pull-up. Pulls low when active from overcurrent detection of output stage.
30
nERROR1
O
3.3
Overcurrent protection output, channel B output stage. Open drain 16mA driver, with internal
100kΩ (approx.) pull-up. Pulls low when active from overcurrent detection of output stage.
31
nERROR2
O
3.3
Overcurrent protection output, channel C output stage. Open drain 16mA driver, with internal
100kΩ (approx.) pull-up. Pulls low when active from overcurrent detection of output stage.
32
nERROR3
O
3.3
Overcurrent protection output, channel D output stage. Open drain 16mA driver, with internal
100kΩ (approx.) pull-up. Pulls low when active from overcurrent detection of output stage.
33
HVDDD
P
HV
Output stage D high voltage supply power. A separate power pin connection is provided for
each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to the
system “HV” power source.
34
HGNDD
GND
HV
Output stage D high voltage supply ground. A separate ground pin connection is provided
for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power
ground (also see Note 15).
35
OUTD
O
HV
PWM power amplifier output, channel D.
36
HSBSD
I
HV
High-side boot strap input, output channel D. Capacitor couples to OUTD amplifier output.
37
HSBSC
I
HV
High-side boot strap input, output channel C. Capacitor couples to OUTC amplifier output.
38
OUTC
O
HV
PWM power amplifier output, channel C.
39
HGNDC
GND
HV
Output stage C high voltage supply ground. A separate ground pin connection is provided
for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power
ground (also see Note 15).
40
HVDDC
P
HV
Output stage C high voltage supply power. A separate power pin connection is provided for
each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to the
system “HV” power source.
41
SUBOUT
O
3.3
“Subwoofer” channel PWM output, with 16mA drive strength. Connects to filter network for
supplying line-level analog output to subwoofer.
42
DNC
-
Do not connect to this pin.
Pin Description (Continued)
PIN
NAME
(Note 13) TYPE
VOLTAGE
LEVEL
(V)
DESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| D2-45157-QR-T | 功能描述:音頻 DSP DAE-4P MULTI-DIE LW- PWR CLASS-AMPLIFIER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| D245-5 | 制造商:KLEIN TOOLS 功能描述:Plier, Diagonal-Cutting; Tapered; 5-1/16 in.; 11/16 in.; 9/16 in.; 3/8 in.; Red 制造商:Klein Tools Inc 功能描述:TOOLS PLIERS 制造商:KLEIN TOOLS 功能描述:TOOLS, PLIERS; Plier Style:Diagonal Cutting; Jaw Length:18mm; Overall Length:129mm; Features:Tapered nose gets in confined areas; ideal for close-tip cutting; Handle Color:Red ;RoHS Compliant: NA 制造商:Klein Tools Inc 功能描述:Standard Diagonal Cutting Pliers |
| D245-5C | 制造商:Klein Tools Inc 功能描述: |
| D246 | 制造商:PETERMANN 制造商全稱:PETERMANN 功能描述:HIGH RELIABILITY FOR LOW COST |
| D24-6 | 制造商:RICHARD MANNO 功能描述: |
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