參數(shù)資料
型號(hào)： D-16
廠商： Texas Instruments, Inc.
英文描述： LOW-POWER DISSIPATION ADSL LINE DRIVER
中文描述： 低功耗ADSL線路驅(qū)動(dòng)器
文件頁數(shù)： 14/30頁
文件大?。?/td> 1105K
代理商： D-16
www.ti.com
100
90
80
70
60
50
40
30
f Frequency Hz
Full Bias
Low Bias
3
Mid Bias
Differential configuration
100 k
1 M
10 M
100 M
V
CC
=
±
5 V
Gain = 5
R
L
50
R
F
= 1 k
V
O
= 2 V
PP
100
95
90
85
80
75
0
5
10
15
20
25
30
35
40
Output Voltage Vpp
Full Bias
Low Bias
2
Mid Bias
Differential configuration
V
CC
=
±
12 V
Gain = 5
R
L
= 200
R
F
= 1 k
f = 1 MHz
100
90
80
70
60
50
40
30
f Frequency Hz
Full Bias
Low Bias
3
Mid Bias
Differential configuration
100 k
1 M
10 M
100 M
V
CC
=
±
12 V
Gain = 5
R
L
= 50
R
F
= 1 k
V
O
= 2 V
PP
100
95
90
85
80
75
0
5
10
Output Voltage Vpp
Full Bias
Low Bias
2
Mid Bias
V
CC
=
±
5 V
Gain = 5
R
L
= 200
R
F
= 1 k
f = 1 MHz
Output Voltage Vpp
2
80
75
70
65
0
5
10
15
20
25
30
Full Bias
Low Bias
Mid Bias
V
CC
=
±
12 V
Gain = 5
R
L
= 50
R
= 1 k
f = 1 MHz
80
75
70
65
0
2
4
6
8
10
Output Voltage Vpp
Full Bias
Low Bias
2
Mid Bias
Differential configuration
V
CC
=
±
5 V
Gain = 5
R
L
= 50
R
F
= 1 k
f = 1 MHz
100
95
90
85
80
75
70
0
5
10
15
20
25
30
35
40
Output Voltage Vpp
Full Bias
Low Bias
Mid Bias
3
Differential configuration
V
CC
=
±
12 V
Gain = 5
R
L
= 200
R
F
= 1 k
f = 1 MHz
100
95
90
85
80
75
70
0
2
4
6
8
10
Output Voltage Vpp
Low Bias
Mid Bias
3
Full Bias
Differential configuration
V
CC
=
±
5 V
Gain = 5
R
L
= 200
R
F
= 1 k
f = 1 MHz
100
95
90
85
80
75
70
65
0
5
10
15
20
25
30
Output Voltage Vpp
Full Bias
Low Bias
Mid Bias
3
Differential configuration
V
CC
=
±
12 V
Gain = 5
R
L
= 50
R
F
= 1 k
f = 1 MHz
THS6182
SLLS544G–SEPTEMBER 2002–REVISED NOVEMBER 2004
3RD HARMONIC DISTORTION
vs
FREQUENCY
3RD HARMONIC DISTORTION
vs
FREQUENCY
2ND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
Figure 59.
Figure 60.
Figure 61.
2ND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
2ND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
2ND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
Figure 62.
Figure 63.
Figure 64.
3RD HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
3RD HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
3RD HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
Figure 65.
Figure 66.
Figure 67.
14
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