參數(shù)資料
型號: CYV270M0101EQ-SXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 音頻控制
英文描述: Adaptive Video Cable Equalizer (SOIC)
中文描述: 1 CHANNEL(S), EQUALIZER CIRCUIT, PDSO16
封裝: 0.150 INCH, ROHS COMPLIANT, MS-012, SOIC-16
文件頁數(shù): 3/10頁
文件大?。?/td> 319K
代理商: CYV270M0101EQ-SXC
CYV270M0101EQ
Document #: 001-06830 Rev. *A
Page 3 of 10
Equalizer Operation
The CYV270M0101EQ is an adaptive video cable equalizer
designed to equalize standard definition (SD) serial digital
interface (SDI) video data streams. The CYV270M0101EQ
equalizer is optimized to equalize up to 350m of Belden 1694A
cable at 270 Mbps. The CYV270M0101EQ equalizer contains
one power supply and typically consumes 160 mW power at
3.3V. The adaptive equalizer is designed to meet the SMPTE
259M and DVB-ASI video standards. The equalizer meets all
pathological requirements for SMPTE 259M as defined by
RP178. The CYV270M0101EQ Video Cable Equalizer is
auto-adaptive from 143 Mbps to 360 Mbps.
The CYV270M0101EQ equalizer has variable gain and
multiple equalization stages that reverse the effects of the
cable. This equalization is achieved by separate regulation of
the lower and higher frequency components in the signal to
give a clean eye. The CYV270M0101EQ has DC restoration
for compensating the DC content of the SMPTE pathological
patterns.
SDI, SDI
The CYV270M0101EQ accepts single-ended or differential
serial video data streams over 75
coaxial cable. It is recom-
mended to AC-couple the SDI, SDI inputs as they are inter-
nally biased to 1.2V.
Pin Descriptions
CYV270M0101EQ Single Channel Cable Equalizer
Name
I/O Characteristics Signal Description
Control Signals
CLI
Analog Output
Cable Length Indicator:
CLI provides an analog voltage proportional to the cable
length being equalized.
CD/MUTE
LVTTL I/O
Carrier Detect/Mute Indicator:
Output:
When the incoming data stream is present, the CD/MUTE outputs a voltage less than
0.8V.
When the incoming data stream is not present, the CD/MUTE outputs a voltage
greater than 2.9V.
Input:
When the CD/MUTE pin is tied to ground, the equalizer’s differential serial outputs
are not muted and the MCLADJ setting is overwritten.
When the CD/MUTE pin is tied to V
CC
, the equalizer’s differential serial outputs are
muted and the MCLADJ setting is overwritten.
MCLADJ
Analog Input
Maximum Cable Length Adjust:
The maximum cable length to be equalized is set
by the voltage applied to the MCLADJ input. When the maximum cable length set by
MCLADJ is reached, the differential output is muted.
BYPASS
LVTTL Input
Equalizer Bypass:
When BYPASS is tied to V
CC
, the
signal presented at the
equalizer’s differential serial inputs (SDI, SDI) is routed to the equalizer’s differential
serial outputs (SDO, SDO) without performing equalization.
When BYPASS is tied to GND, the incoming video data stream is equalized and
presented at the equalizer‘s serial differential outputs (SDO, SDO).
In equalizer bypass mode, CD/MUTE is not functional.
AGC±
Analog
Automatic Gain Control:
A capacitor of 1
μ
F should be placed between the AGC±
pins.
SDO, SDO
Differential
Output
Differential Serial Outputs:
The equalized serial video data stream is presented at
the SDO/SDO differential serial CML output.
SDI, SDI
Differential
Input
Differential Serial Inputs:
SDI/SDI can accept either a single ended or differential
serial video data stream over 75
coaxial cable.
Power
VCC
Power
+3.3V Power.
GND
Gnd
Connect to Ground.
[+] Feedback
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參數(shù)描述
CYV270M0101EQ-SXCES 制造商:Cypress Semiconductor 功能描述:
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