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參數(shù)資料
| 型號(hào)： | CYP15G0201DXB-BBI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ULTRA-THIN SVGA CABLE 15FT MALE/MALE |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA196 |
| 封裝： | 15 X 15 MM, 1.50 MM HEIGHT, FBGA-196 |
| 文件頁(yè)數(shù)： | 1/46頁(yè) |
| 文件大?。?/td> | 577K |
| 代理商： | CYP15G0201DXB-BBI |
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Dual-channel HOTLink II Transceiver
CYP15G0201DXB
CYV15G0201DXB
Cypress Semiconductor Corporation
Document #: 38-02058 Rev. *G
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised January 26, 2004
Features
Dual channel transceiver for 195 to 1500 MBaud serial
signaling rate
—Aggregate throughput of 12 GBits/second
Second-generation HOTLink
technology
Compliant to multiple standards
—ESCON, DVB-ASI, Fibre Channel and Gigabit
Ethernet (IEEE802.3z)
—CYV15G0201DXB also compliant to SMPTE 259M
and SMPTE 292M
—8B/10B encoded or 10-bit unencoded data
Selectable parity check/generate
Selectable dual-channel bonding option
—One 16-bit channels
Skew alignment support for multiple bytes of offset
Selectable input/output clocking options
MultiFrame Receive Framer
—Bit and Byte alignment
—Comma or full K28.5 detect
—Single- or multi-byte framer for byte alignment
—Low-latency option
Synchronous LVTTL parallel interface
Internal phase-locked loops (PLLs) with no external
PLL components
Optional Phase-Align Buffer in transmit path
Optional Elasticity Buffer in receive path
Dual differential PECL-compatible serial inputs per
channel
—Internal DC-restoration
Dual differential PECL-compatible serial outputs per
channel
—
Source matched for 50
transmission lines
—No external bias resistors required
—Signaling-rate controlled edge-rates
Compatible with
—fiber-optic modules
—copper cables
—circuit board traces
JTAG boundary scan
Built-In Self-Test (BIST) for at-speed link testing
Per-channel Link Quality Indicator
—Analog signal detect
—Digital signal detect
Low power 1.8W @ 3.3V typical
Single 3.3V supply
196-ball BGA
0.25
μ
BiCMOS technology
Functional Description
The CYP(V)15G0201DXB
[1]
Dual-channel HOTLink II
Transceiver is a point-to-point or point-to-multipoint communi-
cations building block allowing the transfer of data over
high-speed serial links (optical fiber, balanced, and unbal-
anced copper transmission lines) at signaling speeds ranging
from 195- to 1500-MBaud per serial link.
The CYV15G0201DXB satisfies the SMPTE 259M and
SMPTE 292M compliance as per the EG34-1999 Pathological
Test Requirements.
Note:
1.
CYV15G0201DXB refers to SMPTE 259M and SMPTE 292M compliant devices.
CYP15G0201DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements.
CYP(V)15G0201DXB refers to both devices.
Figure 1. HOTLink II System Connections
S
10
10
10
10
S
10
10
10
10
Serial Links
Serial Links
Backplane or
Cabled
Connections
C
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYV15G0201DXB | Dual-channel HOTLink II Transceiver |
| CYV15G0201DXB-BBC | Dual-channel HOTLink II Transceiver |
| CYV15G0404RB-BGC | Independent Clock Quad HOTLink Reclocking Deserializer |
| CYW15G0101DXB | Single-channel HOTLink II Transceiver(單通道熱連接II收發(fā)器) |
| CYW2315 | Serial Input PLL with 1.2-GHz Prescaler(帶1.2-GHz 預(yù)標(biāo)定器的串聯(lián)輸入PLL) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYP15G0201DXB-BBXC | 功能描述:電信線路管理 IC Dual Channel XCVR 1.5Gbps Bckplane COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYP15G0201DXB-BBXI | 功能描述:電信線路管理 IC Dual Channel XCVR 1.5Gbps Bckplane IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYP15G0401DXA | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II Transceiver |
| CYP15G0401DXA-BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II Transceiver |
| CYP15G0401DXA-BGI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II Transceiver |
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