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參數(shù)資料
| 型號(hào)： | CYM8210BPM-70C |
| 英文描述： | x16 SRAM Module |
| 中文描述： | x16的SRAM模塊 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 106K |
| 代理商： | CYM8210BPM-70C |
CYM8210BPM
Document #: 38-05008 Rev. **
Page 5 of 8
Switching Waveforms
Read Cycle No. 1
[7, 8]
Read Cycle No. 2
[7, 9]
Write Cycle No. 1 (WE Controlled)
[6]
Notes:
7.
8.
9.
WH/WL is HIGH for read cycle.
Device is continuously selected, E3/E2/E1/E0 = V
and G = V
.
Address valid prior to or coincident with E3/E2/E1/E0 transition LOW.
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
1841A
–
6
ADDRESS
DATA OUT
DATA VALID
t
RC
t
ACS
t
DOE
t
LZOE
t
LZCS
HIGH IMPEDANCE
t
HZOE
t
HZCS
HIGH
IMPEDANCE
8210
–
7
DATA OUT
G
E3/E2/E1/E0
t
WC
DATA VALID
DATA UNDEFINED
HIGH IMPEDANCE
t
SCS
t
AW
t
SA
t
PWE
t
HA
t
HD
t
HZWE
t
LZWE
t
SD
WH/WL
8210
–
8
ADDRESS
DATA IN
DATA OUT
E3/E2/E1/E0
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