參數(shù)資料
型號: CYM1851V33
廠商: Cypress Semiconductor Corp.
英文描述: 1,024K x 32 3.3V Static RAM Module(1024K x 32 3.3V 靜態(tài)RAM模塊)
中文描述: 1024畝× 32 3.3靜態(tài)存儲器模塊(1024K × 32 3.3靜態(tài)內(nèi)存模塊)
文件頁數(shù): 1/8頁
文件大小: 122K
代理商: CYM1851V33
PRELIMINARY
1,024K x 32 3.3V Static RAM Module
CYM1851V33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
Apr 1998 - Revised June 30, 1998
408-943-2600
3
Features
High-density 3.3V 32-megabit SRAM module
32-bit Standard Footprint supports densities from
16K x 32 through 1M x 32
High-speed SRAMs
—Access time of 12 ns
Low active power
—3.3W (max.) at 12 ns
72 pins
Available in ZIP, SIMM, or angled SIMM format
Functional Description
The CYM1851V33 is a 3.3V high-performance 32-megabit
static RAM module organized as 1,024K words by 32 bits. This
module is constructed from eight 1,024K x 4 SRAMs in SOJ
packages mounted on an epoxy laminate substrate. Four chip
selects are used to independently enable the four bytes. Read-
ing or writing can be executed on individual bytes or any com-
bination of multiple bytes through proper use of selects.
The CYM1851V33 is designed for use with standard 72-pin
SIMM sockets. The pinout is downward compatible with the
64-pin JEDEC ZIP/SIMM module family (CYM1821,
CYM1831, CYM1836, and CYM1841). Thus, a single mother-
board design can be used to accommodate memory depth
ranging from 16K words (CYM1821) to 1,024K words
(CYM1851). The CYM1851V33 is offered in vertical and an-
gled SIMM configurations and both are available with either
tin-lead or 10 micro-inches of gold flash on the edge contacts.
Presence detect pins (PD
0
PD
3
) are used to identify module
memory density in applications where modules with alternate
word depths can be interchanged.
A
0
-A
19
OE
WE
Logic BlockDiagram
Pin Configuration
1851V33–1
1851V33–2
I/O
0
I/O
3
CS
3
CS
1
20
4
4
4
4
4
4
4
4
CS
2
CS
4
I/O
8
I/O
11
I/O
16
I/O
19
I/O
24
I/O
27
PD
0
- GND
PD
1
- OPEN
PD
2
- GND
PD
3
- OPEN
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
ZIP/SIMM
Top View
NC
PD
3
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
7
A
8
A
9
I/O
4
I/O
5
A
4
A
5
PD
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
6
I/O
7
WE
A
14
CS
1
GND
A
15
CS
2
NC
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
CS
3
A
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
23
GND
A
19
NC
I/O
14
I/O
15
CS
4
A
17
OE
I/O
24
I/O
25
I/O
26
I/O
27
A
3
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
A
18
NC
I/O
4
–I/O
7
I/O
12
–I/O
15
I/O
20
–I/O
23
I/O
28
–I/O
31
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