參數(shù)資料
型號(hào): CYM1846
廠商: Cypress Semiconductor Corp.
英文描述: 512K x 32 Static RAM Module(512K x 32 位靜態(tài)模塊)
中文描述: 512k × 32的靜態(tài)RAM模塊(512k × 32的位靜態(tài)模塊)
文件頁數(shù): 5/7頁
文件大?。?/td> 136K
代理商: CYM1846
CYM1846
5
Switching Waveforms
Read Cycle No. 1
[7, 8]
Read Cycle No. 2
[7, 9]
Write Cycle No. 1 (WE Controlled)
[6]
Notes:
7.
8.
9.
WE is HIGH for read cycle.
Device is continuously selected, CS = V
, and OE= V
.
Address valid prior to or coincident with CS transition LOW.
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
1846–4
ADDRESS
DATA OUT
DATA VALID
t
RC
t
ACS
t
DOE
t
LZOE
t
LZCS
HIGH IMPEDANCE
t
HZOE
t
HZCS
HIGH
IMPEDANCE
1846–5
DATA OUT
OE
CS
V
CC
SUPPLY
CURRENT
50%
50%
t
PU
ICC
ISB
t
PD
t
WC
DATA VALID
DATA UNDEFINED
HIGH IMPEDANCE
t
SCS
t
AW
t
SA
t
PWE
t
HA
t
HD
t
HZWE
t
LZWE
t
SD
CS
WE
1846–6
ADDRESS
DATA IN
DATA OUT
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