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參數(shù)資料
| 型號： | CYD09S72V-167BBC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM |
| 中文描述： | 128K X 72 DUAL-PORT SRAM, 4 ns, PBGA484 |
| 封裝： | 23 X 23 MM, 1.60 MM HEIGHT, 1 MM PITCH, MO-192, FBGA-484 |
| 文件頁數(shù)： | 16/26頁 |
| 文件大小： | 470K |
| 代理商： | CYD09S72V-167BBC |
PRELIMINARY
CYD04S72V
CYD09S72V
CYD18S72V
Document #: 38-06069 Rev. *D
Page 16 of 26
Bank Select Read
[32, 33]
Read-to-Write-to-Read (OE = LOW)
[31, 34, 35, 36, 37]
Notes:
32. In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress FLEx72 device from this data sheet. ADDRESS
(B1)
= ADDRESS
(B2)
.
33. ADS = CNTEN= BE0 – BE7 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
34. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
35. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
36.
CE
0
= OE = BE0 – BE7 = LOW; CE
1
= R/W = CNTRST = MRST = HIGH.
37. CE
= BE0 – BE7 = R/W = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be
completed (labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
Switching Waveforms
(continued)
Q
3
Q
1
Q
0
Q
2
A
0
A
1
A
2
A
3
A
4
A
5
Q
4
A
0
A
1
A
2
A
3
A
4
A
5
t
SA
t
HA
t
SC
t
HC
t
SA
t
HA
t
SC
t
HC
t
SC
t
HC
t
SC
t
HC
t
CKHZ
t
DC
t
DC
t
CD2
t
CKLZ
t
CD2
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CH2
t
CL2
t
CYC2
CLK
ADDRESS
(B1)
CE
(B1)
DATA
OUT(B2)
DATA
OUT(B1)
ADDRESS
(B2)
CE
(B2)
CLK
CE
R/W
ADDRESS
DATA
IN
DATA
OUT
t
HC
t
SC
t
HW
t
SW
t
HA
t
SA
t
HW
t
SW
t
CD2
t
CKHZ
t
SD
t
HD
NO
OPERATION
WRITE
READ
A
n
A
n+1
A
n+2
A
n+2
D
n+2
A
n+2
A
n+3
Q
n
t
CL2
t
CH2
t
CYC2
t
DC
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CYD09S72V18-167BBXC | 功能描述:靜態(tài)隨機存取存儲器 9216K (128Kx72) 1.8v 167MHz Sync 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CYD09S72V18-167BBXI | 功能描述:IC SRAM 9MBIT 167MHZ 256LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CYD09S72V18-167BGXC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CYD09S72V18-167BGXI | 制造商:Cypress Semiconductor 功能描述: |
| CYD09S72V18-200BBXC | 功能描述:靜態(tài)隨機存取存儲器 FullFlex72 9MSync DP 128Kx72, 90nm, SDR RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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