參數(shù)資料
型號: CY9C62256-70ZI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 存儲器
英文描述: 32K x 8 Magnetic Nonvolatile CMOS RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PDSO28
封裝: 8 X 13.40 MM, TSOP-28
文件頁數(shù): 3/11頁
文件大小: 374K
代理商: CY9C62256-70ZI
PRELIMINARY
CY9C62256
Document #: 38-15001 Rev. *E
Page 3 of 11
of surface mount assembly. This can be eliminated with
MRAM. In case of DIP battery backed modules, the assembly
techniques are constrained to through-hole assembly and
board wash using no water.
System Reliability
: Battery-backed SRAM is inherently
vulnerable to shock and vibration. In addition, a negative
voltage, even a momentary undershoot, on any pin of a
battery-backed SRAM can cause data loss. The negative
voltage causes current to be drawn directly from the battery,
weakens the battery, and reduces its capacity over time. In
general, there is no way to monitor the lost battery capacity.
MRAM guarantees reliable operation across the voltage range
with inherent nonvolatility.
Space
: Battery-backed SRAM in DIP modules takes up board
space height and dictates through-hole assembly. MRAM is
offered in surface mount as well as DIP packages.
Field Maintenance
: Batteries must eventually be replaced
and this creates an inherent maintenance problem. Despite
projections of long life, it is difficult to know how long a battery
will last, considering all the factors that degrade them.
Environmental
: Lithium batteries are a potential disposal
burden and considered a fire hazard. MRAM eliminates all
such issues through a truly monolithic nonvolatile solution.
Users replacing battery-backed SRAMs with integrated Real
Time Clock (RTC) in the same package may need to move
RTC function to a different location within the system.
EEPROM Replacement
CY9C62256 can also replace EEPROM in current applica-
tions. CY9C62256 is pinout and functionally compatible to
bytewide EEPROM, however it does not need data-bar polling,
page write and hardware write protect due to its fast write and
inadvertent write protect features.
Users replacing EEPROMs with MRAM can eliminate the
page mode operation and simplify to standard asynchronous
write. Additionally, data-bar polling can be eliminated, since
every byte write is completed within same cycle. All writes are
completed within 70 ns.
FeRAM Replacement
FeRAM requires addresses to be latched on falling edge of
CE, which adds to system overhead in managing the CE and
latching function. MRAM eliminates this overhead by offering
a simple asynchronous SRAM interface.
Users replacing FeRAM can simplify their address decoding
since CE does not need to be driven active and then inactive
for each address. This overhead is eliminated when using
MRAM.
Secondly, MRAM read is nondestructive and no precharge
cycle is required like the one used with FeRAM.This has no
apparent impact to the design, however the read cycle time
can now see immediate improvement equal to the precharge
time.
Boot-up PROM (EPROM, PROM) Function Replacement
The CY9C62256 can be accessed like an EPROM or PROM.
When CE and OE are low and WE is high, the data stored at
the memory location determined by the address pins is
asserted on the outputs. MRAM may be used to accomplish
system boot up function using this condition.
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相關代理商/技術參數(shù)
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CY9C6264 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8K x 8 Magnetic Nonvolatile CMOS RAM
CY9C6264-70PC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8K x 8 Magnetic Nonvolatile CMOS RAM
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CY9C6264-70SC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8K x 8 Magnetic Nonvolatile CMOS RAM
CY9C6264-70SI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8K x 8 Magnetic Nonvolatile CMOS RAM