參數(shù)資料
型號(hào): CY8C27666-SPPVXI
廠商: Cypress Semiconductor Corp.
英文描述: PSoC⑩ Mixed Signal Array
中文描述: ⑩的PSoC混合信號(hào)陣列
文件頁(yè)數(shù): 21/39頁(yè)
文件大小: 610K
代理商: CY8C27666-SPPVXI
June 1, 2004
Document No. 38-12019 Rev. *B
21
CY8C27x66 Preliminary Data Sheet
3. Electrical Specifications
3.3.6
DC Analog Reference Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
T
A
85
°
C, or 3.0V to 3.6V and -40
°
C
T
A
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only or unless otherwise specified.
The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks. The power levels for AGND refer to
the power of the Analog Continuous Time PSoC block. The power levels for RefHi and RefLo refer to the Analog Reference Control
register. The limits stated for AGND include the offset error of the AGND buffer local to the Analog Continuous Time PSoC block.
Table 3-11: 5V DC Analog Reference Specifications
Symbol
V
BG5
Description
Min
Typ
Max
Units
Bandgap Voltage Reference 5V
1.28
1.30
1.32
V
AGND = Vdd/2
a
CT Block Power = High
AGND = 2*BandGap
a
CT Block Power = High
AGND = P2[4] (P2[4] = Vdd/2)
a
CT Block Power = High
AGND = BandGap
a
CT Block Power = High
AGND = 1.6*BandGap
a
CT Block Power = High
AGND Column to Column Variation (AGND=Vdd/2)
a
CT Block Power = High
RefHi = Vdd/2 + BandGap
Ref Control Power = High
a. AGND tolerance includes the offsets of the local buffer in the PSoC block. Bandgap voltage is 1.3V ± 0.02V.
Vdd/2 - 0.017
Vdd/2
Vdd/2 + 0.017
V
2.52
2.60
2.72
V
P2[4] - 0.013
P2[4]
P2[4] + 0.013
V
1.27
1.3
1.33
V
2.03
2.08
2.13
V
-0.034
0.000
0.034
V
Vdd
/2 + 1.218
Vdd
/2 + 1.3
Vdd
/2 + 1.382
V
RefHi = 3*BandGap
Ref Control Power = High
RefHi = 2*BandGap + P2[6] (P2[6] = 1.3V)
Ref Control Power = High
RefHi = P2[4] + BandGap (P2[4] = Vdd/2)
Ref Control Power = High
RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)
Ref Control Power = High
RefHi = 2*BandGap
Ref Control Power = High
RefHi = 3.2*BandGap
Ref Control Power = High
RefLo = Vdd/2 – BandGap
Ref Control Power = High
3.75
3.9
4.05
V
P2[6] + 2.478
P2[6] + 2.6
P2[6] + 2.722
V
P2[4] + 1.218
P2[4] + 1.30
P2[4] + 1.382
V
P2[4] + P2[6] - 0.058
P2[4] + P2[6]
P2[4] + P2[6] + 0.058
V
2.50
2.60
2.70
V
4.02
4.16
4.29
V
Vdd
/2 - 1.369
Vdd
/2 - 1.30
Vdd
/2 - 1.231
V
RefLo = BandGap
Ref Control Power = High
RefLo = 2*BandGap - P2[6] (P2[6] = 1.3V)
Ref Control Power = High
RefLo = P2[4] – BandGap (P2[4] = Vdd/2)
Ref Control Power = High
RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)
Ref Control Power = High
1.20
1.30
1.40
V
2.489 - P2[6]
2.6 - P2[6]
2.711 - P2[6]
V
P2[4] - 1.368
P2[4] - 1.30
P2[4] - 1.232
V
P2[4] - P2[6] - 0.042
P2[4] - P2[6]
P2[4] - P2[6] + 0.042
V
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