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參數(shù)資料
| 型號(hào)： | CY8C24794-SPC |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | PSoCTM Mixed-Signal Array |
| 中文描述： | PSoCTM混合信號(hào)陣列 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 366K |
| 代理商： | CY8C24794-SPC |
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April 14, 2005
Document No. 38-12018 Rev. *F
14
CY8C24794 Final Data Sheet
3. Electrical Specifications
3.3.2
DC General Purpose IO Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, or 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only.
3.3.3
DC Full-Speed USB Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -10
°
C
≤
T
A
≤
85
°
C, or 3.0V to 3.6V and -10
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only.
Table 3-5. DC GPIO Specifications
Symbol
R
PU
R
PD
V
OH
Description
Min
Typ
Max
Units
k
k
V
Notes
Pull-Up Resistor
4
5.6
8
Pull-Down Resistor
4
5.6
8
High Output Level
Vdd - 1.0
–
–
IOH = 10 mA, Vdd = 4.75 to 5.25V (8 total loads,
4 on even port pins (for example, P0[2], P1[4]),
4 on odd port pins (for example, P0[3], P1[5])).
80 mA maximum combined IOH budget.
IOL = 25 mA, Vdd = 4.75 to 5.25V (8 total loads,
4 on even port pins (for example, P0[2], P1[4]),
4 on odd port pins (for example, P0[3], P1[5])).
150 mA maximum combined IOL budget.
Vdd = 3.0 to 5.25.
V
OL
Low Output Level
–
–
0.75
V
V
IL
V
IH
V
H
I
IL
C
IN
C
OUT
Input Low Level
–
–
0.8
V
Input High Level
2.1
–
V
Vdd = 3.0 to 5.25.
Input Hysterisis
–
60
–
mV
Input Leakage (Absolute Value)
–
1
–
nA
Gross tested to 1
μ
A.
Capacitive Load on Pins as Input
–
3.5
10
pF
Package and pin dependent. Temp = 25
o
C.
Package and pin dependent. Temp = 25
o
C.
Capacitive Load on Pins as Output
–
3.5
10
pF
Table 3-6. DC Full-Speed (12 Mbps) USB Specifications
Symbol
USB Interface
V
DI
V
CM
V
SE
C
IN
I
IO
R
EXT
V
UOH
V
UOHI
V
UOL
Z
O
V
CRS
Description
Min
Typ
Max
Units
Notes
Differential Input Sensitivity
0.2
–
–
V
| (D+) - (D-) |
Differential Input Common Mode Range
0.8
–
2.5
V
Single Ended Receiver Threshold
0.8
–
2.0
V
Transceiver Capacitance
–
–
20
pF
High-Z State Data Line Leakage
-10
–
10
μ
A
V
0V < V
IN
< 3.3V.
In series with each USB pin.
External USB Series Resistor
23
–
25
Static Output High, Driven
2.8
–
3.6
15 k
± 5% to Ground. Internal pull-up enabled.
15 k
± 5% to Ground. Internal pull-up enabled.
15 k
± 5% to Ground. Internal pull-up enabled.
Including R
EXT
Resistor.
Static Output High, Idle
2.7
–
3.6
V
Static Output Low
–
–
0.3
V
USB Driver Output Impedance
28
–
44
D+/D- Crossover Voltage
1.3
–
2.0
V
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| CY8C24794-SPSX | PSoCTM Mixed-Signal Array |
| CY8C27543-24AXI | PSoC Mixed Signal Array |
| CY8C27643-24LFI | PSoC Mixed Signal Array |
| CY8C27643-24LFIT | PSoC Mixed Signal Array |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C24794-SPE | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPLFX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPPVX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
| CY8C24794-SPPX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array |
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