參數(shù)資料
型號(hào): CY7C63310
廠(chǎng)商: Cypress Semiconductor Corp.
英文描述: enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器)
中文描述: enCoRe II還低速USB外設(shè)控制器(enCoRe II還低速的USB外設(shè)控制器)
文件頁(yè)數(shù): 24/74頁(yè)
文件大小: 1441K
代理商: CY7C63310
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 24 of 74
10.2
When the CPU enters sleep mode the CPUCLK Select (Bit [0],
Table 10-3
) is forced to the Internal Oscillator, and the oscil-
lator is stopped. When the CPU comes out of sleep mode it is
running on the internal oscillator. The internal oscillator
recovery time is three clock cycles of the Internal 32-KHz Low-
power Oscillator.
If the system requires the CPU to run off the external clock
after awaking from sleep mode, firmware will need to switch
the clock source for the CPU.
CPU Clock During Sleep Mode
11.0
Reset
The microcontroller supports two types of resets: Power-on
Reset (POR) and Watchdog Reset (WDR). When reset is
initiated, all registers are restored to their default states and all
interrupts are disabled.
The occurrence of a reset is recorded in the System Status and
Control Register (CPU_SCR). Bits within this register record
the occurrence of POR and WDR Reset respectively. The
firmware can interrogate these bits to determine the cause of
a reset.
The microcontroller resumes execution from Flash address
0x0000 after a reset. The internal clocking mode is active after
a reset, until changed by user firmware.
Note
The CPU clock defaults to 3 MHz (Internal 24 MHz Oscil-
lator divide-by-8 mode) at POR to guarantee operation at the
low V
CC
that might be present during the supply ramp.
Figure 10-3. Timer Capture Block Diagram
16-bit counter
Configuration Status
and Control
Prescale Mux
Capture Registers
Interrupt Controller
1ms
timer
Overflow
Interrupt
Captimer Clock
System Clock
Capture0 Int
Capture1 Int
Table 10-7. Clock I/O Config (CLKIOCR) [0x32] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
CLKOUT Select
Read/Write
-
-
-
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit [7:2]:
Reserved
Bit [1:0]:
CLKOUT Select
0 0 = Internal 24 MHz Oscillator
0 1 = External clock – external clock at CLKIN (P0.0)
1 0 = Internal 32-KHz Low-power Oscillator
1 1 = CPUCLK
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