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參數(shù)資料
| 型號： | CY7C63231A-SC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | enCoRe USB Low-speed USB Peripheral Controller |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO18 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-18 |
| 文件頁數(shù)： | 33/49頁 |
| 文件大?。?/td> | 960K |
| 代理商： | CY7C63231A-SC |
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FOR
FOR
enCoRe
USB
CY7C63221/31A
Document #: 38-08028 Rev. *A
Page 33 of 49
Bit 1: 128-
μ
s Interrupt Enable
The 128-
μ
s interrupt is another source of timer interrupt from the free-running timer. The user should disable both timer
interrupts (128-
μ
s and 1.024-ms) before going into the suspend mode to avoid possible conflicts between servicing the timer
interrupts first or the suspend request first when waking up.
1 = Enable. Periodic interrupts will be generated approximately every 128
μ
s.
0 = Disable.
Bit 0: USB Bus Reset - PS/2 Interrupt Enable
The function of this interrupt is selectable between detection of either a USB bus reset condition, or PS/2 activity. The selection
is made with the USB-PS/2 Interrupt Mode bit in the USB Status and Control Register (
Figure 13-1
). In either case, the interrupt
will occur if the selected condition exists for 256
μ
s, and may occur as early as 128
μ
s.
A USB bus reset is indicated by a single-ended zero (SE0) on the USB D+ and D
–
pins. The USB Bus Reset interrupt occurs
when the SE0 condition ends. PS/2 activity is indicated by a continuous LOW on the SDATA pin. The PS/2 interrupt occurs
as soon as the long LOW state is detected.
During the entire interval of a USB Bus Reset or PS/2 interrupt event, the USB Device Address register is cleared.
The Bus Reset/PS/2 interrupt may occur 128
μ
s after the bus condition is removed.
1 = Enable
0 = Disable
Bit [7:3]:
Reserved.
Bit [2:1]: EP1 Interrupt Enable
The non-control endpoint interrupt (EP1) is generated when:
The USB host writes valid data to an endpoint FIFO. However, if the endpoint is in ACK OUT modes, an interrupt is generated
regardless of data packet validity (i.e., good CRC). Firmware must check for data validity.
The device SIE sends a NAK or STALL handshake packet to the USB host during the host attempts to read data from the
endpoint (INs).
The device receives an ACK handshake after a successful read transaction (IN) from the host.
The device SIE sends a NAK or STALL handshake packet to the USB host during the host attempts to write data (OUTs)
to the endpoint FIFO.
1 = Enable
0 = Disable
Refer to
Table 20-1
for more information.
Bit 0: EP0 Interrupt Enable
If enabled, the control endpoint interrupt is generated when:
The endpoint 0 mode is set to accept a SETUP token.
After the SIE sends a 0 byte packet in the status stage of a control transfer.
The USB host writes valid data to an endpoint FIFO. However, if the endpoint is in ACK OUT modes, an interrupt is generated
regardless of what data is received. Firmware must check for data validity.
The device SIE sends a NAK or STALL handshake packet to the USB host during the host attempts to read data from the
endpoint (INs).
The device SIE sends a NAK or STALL handshake packet to the USB host during the host attempts to write data (OUTs)
to the endpoint FIFO.
1 = Enable EP0 interrupt
0 = Disable EP0 interrupt
Bit #
Bit Name
7
6
5
4
3
2
1
0
Reserved
EP1
Interrupt
Enable
R/W
0
EP0
Interrupt
Enable
R/W
0
Read/Write
Reset
-
0
-
0
-
0
-
0
-
0
-
0
Figure 19-2. Endpoint Interrupt Enable Register (Address 0x21)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C63221A | enCoRe USB Low-speed USB Peripheral Controller |
| CY7C63221A-PC | enCoRe USB Low-speed USB Peripheral Controller |
| CY7C63221A-XC | TV 32C 32#20 SKT RECP |
| CY7C63231A | enCoRe USB Low-speed USB Peripheral Controller(enCoRe USB 低速USB外設(shè)控制器) |
| CY7C64013C | Full-Speed USB (12-Mbps)(全速USB(12-Mbps)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C63231A-SXC | 功能描述:8位微控制器 -MCU enCoRe RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C63231A-SXCT | 功能描述:IC MCU 3K USB LS PERIPH 18-SOIC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| CY7C63310-PXC | 功能描述:USB 接口集成電路 USB 3K Flash 128 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63310-SXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 3K/128 16-SOIC RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63310-SXCES | 制造商:Cypress Semiconductor 功能描述: |
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