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參數(shù)資料
| 型號： | CY7C63231A-SC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | enCoRe USB Low-speed USB Peripheral Controller |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO18 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-18 |
| 文件頁數(shù)： | 17/49頁 |
| 文件大?。?/td> | 960K |
| 代理商： | CY7C63231A-SC |
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FOR
FOR
enCoRe
USB
CY7C63221/31A
Document #: 38-08028 Rev. *A
Page 17 of 49
10.3
The Watchdog Timer Reset (WDR) occurs when the internal Watchdog timer rolls over. Writing any value to the write-only
Watchdog Reset Register at address 0x26 will clear the timer. The timer will roll over and WDR will occur if it is not cleared within
t
WATCH
(see
Figure 10-1
) of the last clear. Bit 6 (Watchdog Reset bit) of the Processor Status and Control Register is set to record
this event (see Section 18.0 for more details). A Watchdog Timer Reset lasts for typically 2
–
4 ms after which the microcontroller
begins execution at ROM address 0x0000.
Watchdog Reset (WDR)
Figure 10-1. Watchdog Reset (WDR, Address 0x26)
11.0
Suspend Mode
The CY7C632XX parts support a versatile low-power suspend mode. In suspend mode, only an enabled interrupt or a LOW state
on the D
–
/SDATA pin will wake the part. Two options are available. For lowest power, all internal circuits can be disabled, so only
an external event will resume operation. Alternatively, a low-power internal wake-up timer can be used to trigger the wake-up
interrupt. This timer is described in Section 11.2, and can be used to periodically poll the system to check for changes, such as
looking for movement in a mouse, while maintaining a low average power.
The CY7C632XX is placed into a low-power state by setting the Suspend bit of the Processor Status and Control Register
(
Figure 18-1
). All logic blocks in the device are turned off except the GPIO interrupt logic, the D
–
/SDATA pin input receiver, and
(optionally) the wake-up timer. The clock oscillators, as well as the free-running and watchdog timers are shut down. Only the
occurrence of an enabled GPIO interrupt, wake-up interrupt, SPI slave interrupt, or a LOW state on the D
–
/SDATA pin will wake
the part from suspend (D
–
LOW indicates non-idle USB activity). Once one of these resuming conditions occurs, clocks will be
restarted and the device returns to full operation after the oscillator is stable and the selected delay period expires. This delay
period is determined by selection of internal vs. external clock, and by the state of the Ext. Clock Resume Delay as explained in
Section 9.0.
In suspend mode, any enabled and pending interrupt will wake the part up. The state of the Interrupt Enable Sense bit (Bit 2,
Figure 18-1
) does not have any effect. As a result, any interrupts not intended for waking from suspend should be disabled through
the Global Interrupt Enable Register and the USB End Point Interrupt Enable Register (Section 19.0).
If a resuming condition exists when the suspend bit is set, the part will still go into suspend and then awake after the appropriate
delay time. The Run bit in the Processor Status and Control Register must be set for the part to resume out of suspend.
Once the clock is stable and the delay time has expired, the microcontroller will execute the instruction following the I/O write that
placed the device into suspend mode before servicing any interrupt requests.
To achieve the lowest possible current during suspend mode, all I/O should be held at either V
CC
or ground
.
In addition, the
GPIO
bit
interrupts (
Figure 19-4
and
Figure 19-5
) should be disabled for any pins that are not being used for a wake-up interrupt. This
should be done even if the main GPIO Interrupt Enable (
Figure 19-1
) is off.
Typical code for entering suspend is shown below:
...
; All GPIO set to low-power state (no floating pins, and bit interrupts disabled unless using for wake-up)
...
; Enable GPIO and/or wake-up timer interrupts if desired for wake-up
...
; Select clock mode for wake-up (see Section 11.1)
mov a, 09h
; Set suspend and run bits
iowr FFh
; Write to Status and Control Register - Enter suspend, wait for GPIO/wake-up interrupt or USB activity
nop
; This executes before any ISR
...
; Remaining code for exiting suspend routine
At least 10.1 ms
since last write to WDR
WDR goes HIGH
for 2
–
4 ms
Execution begins at
ROM Address 0x0000
2
–
4 ms
14.6 ms
(at F
OSC
= 6 MHz)
WDR
t
WATCH = 10.1 to
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C63221A | enCoRe USB Low-speed USB Peripheral Controller |
| CY7C63221A-PC | enCoRe USB Low-speed USB Peripheral Controller |
| CY7C63221A-XC | TV 32C 32#20 SKT RECP |
| CY7C63231A | enCoRe USB Low-speed USB Peripheral Controller(enCoRe USB 低速USB外設(shè)控制器) |
| CY7C64013C | Full-Speed USB (12-Mbps)(全速USB(12-Mbps)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C63231A-SXC | 功能描述:8位微控制器 -MCU enCoRe RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C63231A-SXCT | 功能描述:IC MCU 3K USB LS PERIPH 18-SOIC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| CY7C63310-PXC | 功能描述:USB 接口集成電路 USB 3K Flash 128 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63310-SXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 3K/128 16-SOIC RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63310-SXCES | 制造商:Cypress Semiconductor 功能描述: |
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