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參數(shù)資料
| 型號： | CY7C63001C |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Universal Serial Bus Microcontroller(通用串行總線微控制器) |
| 中文描述： | 通用串行總線控制器（通用串行總線微控制器） |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 1076K |
| 代理商： | CY7C63001C |
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CY7C63001C
CY7C63101C
Document #: 38-08026 Rev. *B
Page 15 of 28
A maximum of 8 bytes are written into the Endpoint 0 FIFO. If
there are less than 8 bytes of data the CRC is written into the
FIFO.
Due to register space limitations, the Receive Data Invalid bit
is located in the USB Endpoint 0 TX Configuration Register.
Refer to the Endpoint 0 Transmit section for details. This bit is
set by the SIE if an error is detected in a received DATA packet.
Table 6-4
summarizes the USB Engine response to SETUP
and OUT transactions on Endpoint 0. In the Data Packet
column ‘Error’ represents a packet with a CRC, PID or
bit-stuffing error, or a packet with more than 8 bytes of data.
‘Valid’ is a packet without an Error. ‘Status’ is a packet that is
a valid control read Status stage, while ‘N/Status’ is not a
correct Status stage (see section 6.9.4). The ‘Stall’ bit is
described in Section 6.9.2.2. The ‘StatusOuts’ and
‘EnableOuts’ bits are described in section 6.9.4.
6.9.2.2
The USB Endpoint 0 TX Register located at I/O address 0x10
controls data transmission from Endpoint 0 (see
Figure 6-19
).
This is a read/write register. All bits are cleared during reset.
Bits 0 to 3 indicate the numbers of data bytes to be transmitted
during an IN packet, valid values are 0 to 8 inclusive. Bit 4
indicates that a received DATA packet error (CRC, PID, or
Endpoint 0 Transmit
bitstuffing error) occurred during a SETUP or OUT data phase.
Setting the Stall bit (bit 5) stalls IN and OUT packets. This bit
is cleared whenever a SETUP packet is received by
Endpoint 0. Bit 6 (Data 1/0) must be set to 0 or 1 to select the
DATA packet’s toggle state (0 for DATA0, 1 for DATA1).
After the transmit data has been loaded into the FIFO, bit 6
should be set according to the data toggle state and bit 7 set
to “1”. This enables the USB Controller to respond to an IN
packet. Bit 7 is cleared and an Endpoint 0 interrupt is
generated by the SIE once the host acknowledges the data
transmission. Bit 7 is also cleared when a SETUP token is
received. The Interrupt Service Routine can check bit 7 to
confirm that the data transfer was successful.
6.9.3
Endpoint 1 is capable of transmit only. The data to be trans-
mitted is stored in the 8-byte Endpoint 1 FIFO located at data
memory space 0x78 to 0x7F.
Endpoint 1
6.9.3.1
Transmission is controlled by the USB Endpoint 1 TX Register
located at I/O address 0x11 (see
Figure 6-20
). This is a
read/write register. All bits are cleared during reset.
Endpoint 1 Transmit
Table 6-4. USB Engine Response to SETUP and OUT Transactions on Endpoint 0
Control Bit Settings
Received Packets
Token
Type
SETUP
SETUP
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
USB Engine Response
Toggle
Update
Update
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
Yes
Stall
-
-
0
0
0
0
1
1
0
0
0
Status Out
-
-
0
0
0
0
0
0
1
1
1
Enable
Out
-
-
1
1
0
0
0
0
0
0
0
Data
Packet
Valid
Error
Valid
Error
Valid
Error
Valid
Error
Status
N/Status
Error
FIFO Write
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
Count
Interrupt
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
No
Reply
ACK
None
ACK
None
NAK
None
STALL
None
ACK
STALL
None
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
No
b7
b6
b5
b4
ERR
R/W
0
b3
b2
b1
b0
INEN
R/W
0
DATA1/0
R/W
0
STALL
R/W
0
COUNT3
R/W
0
COUNT2
R/W
0
COUNT1
R/W
0
COUNT0
R/W
0
Figure 6-19. USB Endpoint 0 TX Configuration Register (Address 0x10)
b7
b6
b5
b4
b3
b2
b1
b0
INEN
R/W
0
DATA1/0
R/W
0
STALL
R/W
0
EP1EN
R/W
0
COUNT3
R/W
0
COUNT2
R/W
0
COUNT1
R/W
0
COUNT0
R/W
0
Figure 6-20. USB Endpoint 1 TX Configuration Register (Address 0x11)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C63001C-PXC | 功能描述:8位微控制器 -MCU Universal Serial Bus Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| CY7C63001C-SC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C63001C-SXC | 功能描述:8位微控制器 -MCU Universal Serial Bus Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| CY7C63001C-SXCT | 功能描述:8位微控制器 -MCU USB Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| CY7C63001C-XC DIE | 制造商:Cypress Semiconductor 功能描述: |
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