- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378513 > CY7C4841 (Cypress Semiconductor Corp.) 4K x9 x2 Double Sync FIFOs(4K x9 x2 雙路同步先進(jìn)先出) PDF資料下載
參數(shù)資料
| 型號： | CY7C4841 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4K x9 x2 Double Sync FIFOs(4K x9 x2 雙路同步先進(jìn)先出) |
| 中文描述： | 4K的X9熱賣x2雙同步FIFO的（4K的X9熱賣x2雙路同步先進(jìn)先出） |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 348K |
| 代理商： | CY7C4841 |
CY7C4801/4811/4821
CY7C4831/4841/4851
19
Bidirectional Configuration
The two FIFOs of the CY7C4801/4811/4821/4831/4841/4851
can be used to buffer data flow in two directions. In the exam-
ple that follows, processor A can write data to processor B via
FIFO A, and, in turn, processor B can write processor A via
FIFO B.
Depth Expansion
CY7C4801/4811/4821/4831/4841/4851can be adapted to ap-
pliations that require greater than 256/512/1024/2048/4096/
8192 words. The existence of dual enable pins on the read and
write ports allow depth expansion. The Write Enable 2/Load
(WENA2, WENB2) pins are used as a second write enables in
a depth expansion configuration, thus the Programmable flags
are set to the default values. Depth expansion is possible by
using one enable input for system control while the other en-
able input is controlled by expansion logic to direct the flow of
data. a typical application would have the expansion logic al-
ternate data access from one device to the next in a sequential
manner. The CY7C4801/4811/4821/4831/4841/ 4851 oper-
ates in the Depth Expansion configuration when the following
conditions are met:
1. WENA2/LDA and WENB2/LDB pins are held HIGH during
Reset so that these pins operate as second Write Enables.
2. External logic is used to control the flow of data.
Figure 4. Block Diagram of Bidirectional Configuration.
9
CY7C4801
CY7C4811
CY7C4821
CY7C4831
CY7C4841
CY7C4851
RAM ARRAY B
RCLKB
RENB1
RAM ARRAY A
WENA2
RENA2
RCLKA
OEA
RENA1
QA
0
QA
8
WCLKA
WENA1
DA
0
DA
8
WENB2
RENB2
WCLKB
WENB1
DB
0
DB
8
OEB
QB
0
QB
8
V
CC
RAM
PROCESSOR A
CLOCK
ADDRESS
CONTROL
DATA
C
L
C
L
V
CC
9
9
9
9
9
9
9
9
PROCESSOR A
CLOCK
ADDRESS
CONTROL
DATA
9
RAM
48X1–18
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C60113 | Wireless enCoRe II Microcontroller(無線enCoRe II微控制器) |
| CY7C60123 | Wireless enCoRe II Microcontroller(無線enCoRe II微控制器) |
| CY7C60223 | Wireless enCoRe II Microcontroller(無線enCoRe II微控制器) |
| CY7C60333 | enCoRe III Low Voltage(enCoRe III低電壓) |
| CY7C60323 | enCoRe III Low Voltage(enCoRe III低電壓) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C4841-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Quad Depth/Width Bi-Dir 4K x 9 x 2 64-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:4K X9 X2 DOUBLE SYNC FIFO - Bulk |
| CY7C4851-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Quad Depth/Width Bi-Dir 8K x 9 x 2 64-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:8K X9 X2 DOUBLE SYNC FIFO - Bulk |
| CY7C510 | 制造商: 功能描述: 制造商:Cypress Semiconductor 功能描述: 制造商:undefined 功能描述: |
| CY7C510-55GMB | 制造商: 功能描述: 制造商:undefined 功能描述: |
| CY7C51055LMB | 制造商:CYPRESS 功能描述:IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。