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參數(shù)資料
| 型號： | CY7C4425-25ASC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| 中文描述： | 64 X 18 OTHER FIFO, 15 ns, PQFP64 |
| 封裝： | 10 X 10 MM, TQFP-64 |
| 文件頁數(shù)： | 11/25頁 |
| 文件大?。?/td> | 409K |
| 代理商： | CY7C4425-25ASC |
CY7C4425/4205/4215
CY7C4225/4235/4245
11
Notes:
23. PAF offset = m. Number of data words written into FIFO already = 64 – m + 1 for the CY7C4425, 256 – m + 1 for the CY7C4205, 512 – m + 1 for the
CY7C4215. 1024 – m + 1 for the CY7C4225, 2048 – m + 1 for the CY7C4235, and 4096 – m + 1 for the CY7C4245.
24. PAF is offset = m.
25. 64 – m words in CY7C4425, 256 – m words inCY7C4205, 512 – m word in CY7C4215. 1024 – m words in CY7C4225, 2048 – m words in CY7C4235, and
4096 – m words in CY7C4245.
26. 64 – m + 1 words in CY7C4425, 256 – m + 1 words in CY7C4205, 512 – m +1 words in CY7C4215, 1024 – m + 1 CY7C4225, 2048 – m + 1 in CY74235,
and 4096 – m + 1 words in CY7C4245.
27. If a write is performed on this rising edge of the write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW.
28. PAF offset = m.
29. 64 – m words in CY7C4425, 256 – m words in FIFO for CY7C4205, 512 – m word in CY7C4215. 1024 – m words in CY7C4225, 2048 – m words in CY7C4235,
and 4096 – m words in CY7C4245.
30. t
is the minimum time between a rising RCLK and a rising WCLK edge for PAF to change state during that clock cycle. If the time between the edge of RCLK and the
rising edge of WCLK is less than t
SKEW3
Switching Waveforms
(continued)
Note
t
ENH
WEN
WCLK
REN
RCLK
t
CLKH
t
PAF
t
ENS
t
CLKL
t
ENS
t
PAF
42X5–15
FULL
M WORDS
IN FIFO
FULL
M + 1 WORDS
IN FIFO
Programmable Almost Full Flag Timing
[26]
PAF
[24]
23
[25]
Note
27
Note
28
t
ENH
WCLK
PAF
RCLK
t
CLKH
t
ENS
FULL
M WORDS
IN FIFO
t
CLKL
t
ENS
FULL-
M+1
ORDS
INFIFO
42X5–16
t
ENH
t
ENS
t
ENH
t
ENS
t
PAF
REN
WEN2
t
SKEW3
t
PAFsynch
[30]
WEN
Programmable Almost Full Flag Timing (applies only in SMODE (SMODE in LOW))
[29]
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C4205-25ASC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-25ASC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4235-25ASC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4245-25ASC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4425-25ASI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C4425V15ASC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C443-12JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 2K x 9 32-Pin PLCC |
| CY7C443-14DC | 制造商:Cypress Semiconductor 功能描述:FIFO, 2K x 9, Synchronous, 28 Pin, Ceramic, DIP |
| CY7C443-14JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 2K x 9 32-Pin PLCC |
| CY7C443-14JCT | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 2K x 9 32-Pin PLCC T/R |
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