參數(shù)資料
型號(hào): CY7C4364
廠商: Cypress Semiconductor Corp.
英文描述: 3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO
中文描述: 3.3每1000 4K的16K的× 36 × 18 × 2三總線先進(jìn)先出
文件頁(yè)數(shù): 25/40頁(yè)
文件大?。?/td> 644K
代理商: CY7C4364
CY7C43646AV
CY7C43666AV
CY7C43686AV
Document #: 38-06026 Rev. *C
Page 25 of 40
Note:
39. Read from FIFO2.
Switching Waveforms
(continued)
OR
t
DIS
t
ENS
t
ENH
t
A
t
A
t
A
t
A
t
EN
t
EN
t
MDV
t
MDV
t
DIS
Previous
Read 1
Read 1
Read 2
Read 2
Read 3
No Operation
CLKB
EFB/ORB
CSB
MBB
ENB
B
0
17
(Standard Mode)
B
0
17
(FWFT Mode)
Port B Word Read Cycle Timing for FIFO1 (CY Standard and FWFT Modes)
OR
t
CLKH
t
CLKL
t
ENS
t
DIS
t
ENS
t
ENH
t
CLK
t
DIS
t
ENH
t
ENS
t
ENH
t
A
t
A
t
A
t
A
t
EN
t
EN
t
MDV
t
MDV
W1
[39]
W2
[39]
W1
[39]
W2
[39
W3
[39
Previous Data
No Operation
CLKA
EFA/ORA
CSA
W/RA
MBA
ENA
A
0
35
(Standard Mode)
A
0
35
(FWFT Mode)
Port A Read Cycle Timing for FIFO2 (CY Standard and FWFT Modes)
[37]
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