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參數(shù)資料
| 型號(hào)： | CY7C4215-25ASI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| 中文描述： | 512 X 18 OTHER FIFO, 15 ns, PQFP64 |
| 封裝： | 10 X 10 MM, TQFP-64 |
| 文件頁(yè)數(shù)： | 6/25頁(yè) |
| 文件大小： | 409K |
| 代理商： | CY7C4215-25ASI |
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CY7C4425/4205/4215
CY7C4225/4235/4245
6
t
PAFsynch
Clock to Programmable Almost-Full Flag
(Synchronous mode, V
CC
/SMODE tied to V
SS
)
Clock to Programmable Almost-Empty Flag
[12]
(Asynchronous mode, V
CC
/SMODE tied to V
CC
)
Clock to Programmable Almost-Full Flag
(Synchronous mode, V
CC
/SMODE tied to V
SS
)
Clock to Half-Full Flag
Clock to Expansion Out
Expansion in Pulse Width
Expansion in Set-Up Time
Skew Time between Read Clock and Write
Clock for Full Flag
Skew Time between Read Clock and Write
Clock for Empty Flag
Skew Time between Read Clock and Write
Clock for Programmable Almost Empty and Pro-
grammable Almost Full Flags.
8
10
15
20
ns
t
PAEasynch
12
16
20
25
ns
t
PAEsynch
8
10
15
20
ns
t
HF
t
XO
t
XI
t
XIS
t
SKEW1
12
7
16
10
20
15
25
20
ns
ns
ns
ns
ns
3
6.5
5
6
10
10
10
14
15
12
4.5
5
t
SKEW2
5
6
10
12
ns
t
SKEW3
10
15
18
20
ns
Switching Characteristics
Over the Operating Range (continued)
Parameter
Description
7C42X5-10
Min.
7C42X5-15
Min.
7C42X5-25
Min.
7C42X5-35
Min.
Max.
Max.
Max.
Max.
Unit
Switching Waveforms
Notes:
10. Pulse widths less than minimum values are not allowed.
11.
Values guaranteed by design, not currently tested.
12.
PAFasynch
, t
, after program register write will not be valid until 5 ns + t
.
13. t
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time between the
rising edge of RCLK and the rising edge of WCLK is less than t
SKEW1
, then FF may not change state until the next WCLK edge.
Write Cycle Timing
t
CLKH
t
CLKL
NO OPERATION
t
DS
t
SKEW1
t
ENS
WEN
t
CLK
t
DH
t
WFF
t
WFF
t
ENH
WCLK
D
0
–D
17
FF
REN
RCLK
42X5–6
[13]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C4215-25AI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-25JC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-25JI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-35AC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-35AI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C4215V-15ASC | 功能描述:IC SYNC FIFO MEM 512X18 64LQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱:72271LA10PF |
| CY7C4215V-15ASXC | 功能描述:先進(jìn)先出 512 X18 LO VLTG SYNC 先進(jìn)先出 COM RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| CY7C4215V-25ASC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C421-65AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C421-65JC | 制造商:Cypress Semiconductor 功能描述:512 X 9 OTHER FIFO, 65 ns, PQCC32 |
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