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參數(shù)資料
| 型號(hào)： | CY7C408A-25LMB |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
| 中文描述： | 64 X 8 OTHER FIFO, 23 ns, CQCC28 |
| 封裝： | LCC-28 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 344K |
| 代理商： | CY7C408A-25LMB |
CY7C408A
CY7C409A
11
If data is to be shifted out simultaneously with the data being
shifted in, the concept of “virtual capacity” is introduced. Virtual
capacity is simply how large a packet of data can be shifted in
at a fixed frequency, e.g., 35 MHz, simultaneously with data
being shifted out at any given frequency. Figure 6 s a graph
of packet size
[30]
vs. shift out frequency (f
SOx
) for two different
values of shift in frequency (f
SIx
) when two FIFOs are
cascaded.
The exact complement of this occurs if the FIFOs initially con-
tain data and a high shift out frequency is to be maintained,
i.e., a 35 MHz f
SOx
can be sustained when reading data pack-
ets from devices cascaded two or three deep.
[31]
If data is
shifted in simultaneously, Figure 6applies with f
SIx
and f
SOx
interchanged.
Figure 6. Virtual Capacity vs. Output Rate for Two FIFOs Cascaded Using an Inverter.
Notes:
30. These are typical packet sizes using an inverter whose delay is 4 ns.
31. Only devices with the same speed grade are specified to cascade together.
C408A–22
0
16
32 36
OUTPUT RATE(f
SOx
) OF BOTTOM FIFO (MHz)
0
150
50
400
350
300
4
12
20 24
8
28
100
200
250
f
SIx
=30MHz
f
SIx
=35MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C409A-25LMB | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
| CY7C408A-25DMB | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
| CY7C408A-35PC | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
| CY7C408A-409A | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
| CY7C409A-25DMB | 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C408A25PC | 制造商:CYPRESS 功能描述:* |
| CY7C408A-25PC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 64 x 8 28-Pin PDIP |
| CY7C408A-25VC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 64 x 8 28-Pin SOJ |
| CY7C408A35PC | 制造商:CYPRESS 功能描述:*NEW* |
| CY7C408A-35PC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 64 x 8 28-Pin PDIP |
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