參數(shù)資料
型號： CY7C344-20HMB
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： PLD
英文描述： 32-Macrocell MAX EPLD
中文描述： UV PLD, 20 ns, CQCC28
封裝： WINDOWED, CERAMIC, LCC-28
文件頁數(shù)： 1/16頁
文件大小： 241K
代理商： CY7C344-20HMB
32-Macrocell MAX
EPLD
CY7C344B
USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
Cypress Semiconductor Corporation
Document #: 38-03006 Rev. *A
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised April 19, 2004
Features
High-performance, high-density replacement for TTL,
74HC, and custom logic
32 macrocells, 64 expander product terms in one LAB
8 dedicated inputs, 16 I/O pins
0.8-micron double-metal CMOS EPROM technology
28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC
package
Functional Description
Available in a 28-pin, 300-mil DIP or windowed J-leaded
ceramic chip carrier (HLCC), the CY7C344 represents the
densest EPLD of this size. Eight dedicated inputs and 16
bidirectional I/O pins communicate to one logic array block. In
the CY7C344 LAB there are 32 macrocells and 64 expander
product terms. When an I/O macrocell is used as an input, two
expanders are used to create an input path. Even if all of the
I/O pins are driven by macrocell registers, there are still 16
“buried” registers available. All inputs, macrocells, and I/O pins
are interconnected within the LAB.
The speed and density of the CY7C344 makes it a natural for
all types of applications. With just this one device, the designer
can implement complex state machines, registered logic, and
combinatorial “glue” logic, without using multiple chips. This
architectural flexibility allows the CY7C344 to replace
multichip TTL solutions, whether they are synchronous,
asynchronous, combinatorial, or all three.
Logic Block Diagram
MACROCELL 2
MACROCELL 4
MACROCELL 6
MACROCELL 8
MACROCELL 10
MACROCELL 12
MACROCELL 14
MACROCELL 16
MACROCELL 18
MACROCELL 20
MACROCELL 22
MACROCELL 24
MACROCELL 26
MACROCELL 28
MACROCELL 30
MACROCELL 32
MACROCELL 1
MACROCELL 3
MACROCELL 5
MACROCELL 7
MACROCELL 9
MACROCELL 11
MACROCELL 13
MACROCELL 15
MACROCELL 17
MACROCELL 19
MACROCELL 21
MACROCELL 23
MACROCELL 25
MACROCELL 27
MACROCELL 29
MACROCELL 31
G
L
O
B
A
L
B
U
S
I
O
C
O
N
T
R
O
L
INPUT
INPUT
INPUT
INPUT
15(22)
15(23)
27(6)
28(7)
INPUT
INPUT/CLK
INPUT
INPUT
1(8)
2(9)
13(20)
14(21)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3(10)
4(11)
5(12)
6(13)
9(16)
10(17)
11(18)
12(19)
17(24)
18(25)
19(26)
20(27)
23(2)
24(3)
25(4)
26(5)
64 EXPANDER PRODUCT TERM ARRAY
32
Pin Configurations
Top View
V
HLCC
25
24
23
22
21
20
19
5
6
7
8
9
10
1112 13 14 1516 1718
4 3 2
28 27 26
I/O
I/O
INPUT
INPUT
INPUT
INPUT
I/O
I/O
INPUT
INPUT
INPUT
INPUT/CLK
I/O
I/O
I
I
I
G
I
I
I
I
V
1
I
G
I
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
INPUT
INPUT
I/O
I/O
I/O
I/O
V
CC
GND
I/O
I/O
I/O
I/O
INPUT
INPUT
INPUT
Top View
CerDIP
INPUT/CLK
I/O
I/O
I/O
I/O
V
CC
GND
I/O
I/O
I/O
I/O
INPUT
INPUT
[1]
相關(guān)PDF資料
PDF描述
CY7C344-20WMB 32-Macrocell MAX EPLD
CY7C344-25HMB 32-Macrocell MAX EPLD
CY7C344-25WMB 32-Macrocell MAX EPLD
CY7C344B 32-Macrocell MAX EPLD
CY7C344 Universal Synchronous EPLD(通用同步EPLD)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C344-20JC 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um Technology 5V 28-Pin PLCC
CY7C344-20JI 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um (CMOS) Technology 5V 28-Pin PLCC 制造商:Cypress Semiconductor 功能描述:Simple EPLD, Programmable Array Logic, 28 Pin, Plastic, PLCC
CY7C34420WC 制造商:CYPRESS 功能描述:*
CY7C344-20WC 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um Technology 5V 28-Pin Windowed CDIP
CY7C344-25JC 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um Technology 5V 28-Pin PLCC 制造商:QP Semiconductor 功能描述:CYP 7C344 DIE 25NS-PLCC
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