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參數(shù)資料
| 型號(hào)： | CY7C1480V25-167AXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| 中文描述： | 2M X 36 CACHE SRAM, 3.4 ns, PQFP100 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026, TQFP-100 |
| 文件頁(yè)數(shù)： | 10/31頁(yè) |
| 文件大?。?/td> | 530K |
| 代理商： | CY7C1480V25-167AXC |
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CY7C1480V25
CY7C1482V25
CY7C1486V25
Document #: 38-05282 Rev. *G
Page 10 of 31
WRITE Cycle, Begin Burst
READ Cycle, Begin Burst
READ Cycle, Begin Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
WRITE Cycle, Continue Burst
WRITE Cycle, Continue Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
WRITE Cycle, Suspend Burst
WRITE Cycle, Suspend Burst
External
External
External
Next
Next
Next
Next
Next
Next
Current
Current
Current
Current
Current
Current
L
L
L
X
X
H
H
X
H
X
X
H
H
X
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
X
X
H
X
H
H
X
X
H
X
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
L
L
L
L
L
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
L
H
H
H
H
L
L
X
L
H
L
H
L
H
X
X
L
H
L
H
X
X
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
D
Q
Tri-State
Q
Tri-State
Q
Tri-State
D
D
Q
Tri-State
Q
Tri-State
D
D
Truth Table for Read/Write
[4]
Function (CY7C1480V25)
GW
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
BWE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
BW
D
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
X
BW
C
X
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
X
BW
B
X
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
X
BW
A
X
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
Read
Read
Write Byte A – (DQ
A
and DQP
A
)
Write Byte B – (DQ
B
and DQP
B
)
Write Bytes B, A
Write Byte C – (DQ
C
and DQP
C
)
Write Bytes C, A
Write Bytes C, B
Write Bytes C, B, A
Write Byte D – (DQ
D
and DQP
D
)
Write Bytes D, A
Write Bytes D, B
Write Bytes D, B, A
Write Bytes D, C
Write Bytes D, C, A
Write Bytes D, C, B
Write All Bytes
Write All Bytes
Truth Table
[2, 3, 4, 5, 6]
(continued)
Operation
Add. Used
CE
1
CE
2
CE
3
ZZ
ADSP
ADSC
ADV
WRITE
OE CLK
DQ
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1480V25-167AXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-167BZC | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-167BZI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-167BZXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-167BZXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1480V25-167AXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1480V25200BZC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Quad 2.5V 72M-Bit 2M x 36 3ns 165-Pin FBGA 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Quad 2.5V 72M-Bit 2M x 36 3ns 165-Pin FBGA Tray |
| CY7C1480V25-200BZC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2Mx36 2.5v Sync PL 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1480V25-250BZCES | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 2.5V 72MBIT 2MX36 3NS 165FBGA - Bulk |
| CY7C1480V33-167ACES | 制造商:Cypress Semiconductor 功能描述: |
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