參數(shù)資料
型號(hào): CY7C1475V25-100BGC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
中文描述: 1M X 72 ZBT SRAM, 8.5 ns, PBGA209
封裝: 14 X 22 MM, 1.76 MM HEIGHT, FBGA-209
文件頁數(shù): 24/30頁
文件大?。?/td> 373K
代理商: CY7C1475V25-100BGC
PRELIMINARY
CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *E
Page 24 of 30
Switching Waveforms
Read/Write Waveforms
[22, 23, 24]
Notes:
22.For this waveform ZZ is tied LOW.
23.When CE is LOW, CE
is LOW, CE
is HIGH and CE
is LOW. When CE is HIGH, CE
is HIGH or CE
is LOW or CE
is HIGH.
24.Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.
WRITE
D(A1)
1
2
3
4
5
6
7
8
9
CLK
tCYC
tCL
tCH
10
CE
tCEH
tCES
WE
CEN
tCENH
tCENS
BW
X
ADV/LD
tAH
tAS
ADDRESS
A1
A2
A3
A4
A5
A6
A7
tDH
tDS
DQ
COMMAND
tCLZ
D(A1)
D(A2)
Q(A4)
Q(A3)
D(A2+1)
tDOH
tCHZ
tCDV
WRITE
D(A2)
BURST
WRITE
D(A2+1)
READ
Q(A3)
READ
Q(A4)
BURST
READ
Q(A4+1)
WRITE
D(A5)
READ
Q(A6)
WRITE
D(A7)
DESELECT
OE
tOEV
tOELZ
tOEHZ
DON’T CARE
UNDEFINED
D(A5)
tDOH
Q(A4+1)
D(A7)
Q(A6)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1475V33-100AXC 制造商:Cypress Semiconductor 功能描述:72MB (1MBX72) NOBL FLOW-THRU, 3.3V CORE, 2.5/3.3V I/O - Bulk
CY7C1475V33-100BGC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 72MBIT 1MX72 8.5NS 209FBGA - Bulk
CY7C1475V33-133BGC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC OCTAL 3.3V 72MBIT 1MX72 6.5NS 209FBGA - Bulk
CY7C14802BC 制造商:Cypress Semiconductor 功能描述:
CY7C14802XC 制造商:Cypress Semiconductor 功能描述: