參數(shù)資料
型號(hào)： CY7C1394BV18-278BZI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
中文描述： 512K X 36 DDR SRAM, 0.45 ns, PBGA165
封裝： 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁(yè)數(shù)： 20/27頁(yè)
文件大?。?/td> 446K
代理商： CY7C1394BV18-278BZI
CY7C1392BV18
CY7C1992BV18
CY7C1393BV18
CY7C1394BV18
Document Number: 38-05623 Rev. *C
Page 20 of 27
Capacitance
[21]
Parameter
C
IN
C
CLK
C
O
Description
Test Conditions
165 FBGA Package
5
6
7
Unit
pF
pF
pF
Input Capacitance
Clock Input Capacitance
Output Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
DD
= 1.8V
V
DDQ
= 1.5V
Thermal Resistance
[21]
Parameter
Θ
JA
Description
Test Conditions
Max.
28.51
Unit
°
C/W
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test conditions follow standard test methods and
procedures for measuring thermal impedance, per
EIA/JESD51.
Θ
JC
5.91
°
C/W
AC Test Loads and Waveforms
Notes:
21.Tested initially and after any design or process change that may affect these parameters.
22.Unless otherwise noted, test conditions assume signal transition time of 2V/ns, timing reference levels of 0.75V, V
= 0.75V, RQ = 250
, V
DDQ
= 1.5V, input
pulse levels of 0.25V to 1.25V, and output loading of the specified I
OL
/I
OH
and load capacitance shown in (a) of AC Test Loads.
1.25V
0.25V
R = 50
5 pF
ALL INPUT PULSES
Device
Under
Test
R
L
= 50
Z
0
= 50
V
REF
= 0.75V
V
REF
= 0.75V
[22]
0.75V
0.75V
Device
Under
Test
OUTPUT
0.75V
V
REF
V
REF
OUTPUT
ZQ
ZQ
(a)
Slew Rate = 2 V/ns
RQ =
250
(b)
RQ =
250
[+] Feedback
相關(guān)PDF資料
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CY7C1394BV18-278BZXC 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
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