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參數(shù)資料
| 型號： | CY7C1339 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 128K x 32 Synchronous-Pipelined Cache RAM(128K x 32 同步流水線式高速緩沖存儲器 RAM) |
| 中文描述： | 128K的× 32同步流水線緩存內存（128K的× 32同步流水線式高速緩沖存儲器的RAM） |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 277K |
| 代理商： | CY7C1339 |
CY7C1339
7
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
.....................................
65
°
C to +150
°
C
Ambient Temperature with
Power Applied
..................................................
55
°
C to +125
°
C
Supply Voltage on V
DD
Relative to GND
.........
0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State
[7]
.......................................
0.5V to V
DD
+ 0.5V
DC Input Voltage
[7]
....................................
0.5V to V
DD
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA
Note:
4.
5.
X=
”
Don't Care
”
, 1=Logic HIGH, 0=Logic LOW.
The SRAM always initiates a read cycle when ADSP asserted, regardless of the state of GW, BWE, or BW
Writes may occur only on subsequent clocks
after the ADSP or with the assertion of ADSC. As a result, OE must be driven HIGH prior to the start of the write cycle to allow the outputs to three-state. OE is
a don't care for the remainder of the write cycle.
OE is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle DQ=HIGH-Z when OE is inactive or
when the device is deselected, and DQ=data when OE is active.
Minimum voltage equals
2.0V for pulse durations of less than 20 ns.
T
A
is the case temperature.
6.
7.
8.
Write Cycle Descriptions
[4, 5, 6]
Function
GW
BWE
BW
3
BW
2
BW
1
BW
0
Read
1
1
X
X
X
X
Read
1
0
1
1
1
1
Write Byte 0 - DQ
[7:0]
1
0
1
1
1
0
Write Byte 1 - DQ
[15:8]
1
0
1
1
0
1
Write Bytes 1, 0
1
0
1
1
0
0
Write Byte 2 - DQ
[23:16]
1
0
1
0
1
1
Write Bytes 2, 0
1
0
1
0
1
0
Write Bytes 2, 1
1
0
1
0
0
1
Write Bytes 2, 1, 0
1
0
1
0
0
0
Write Byte 3 - DQ
[31:24]
1
0
0
1
1
1
Write Bytes 3, 0
1
0
0
1
1
0
Write Bytes 3, 1
1
0
0
1
0
1
Write Bytes 3, 1, 0
1
0
0
1
0
0
Write Bytes 3, 2
1
0
0
0
1
1
Write Bytes 3, 2, 0
1
0
0
0
1
0
Write Bytes 3, 2, 1
1
0
0
0
0
1
Write All Bytes
1
0
0
0
0
0
Write All Bytes
0
X
X
X
X
X
Operating Range
Range
Ambient
Temperature
[8]
V
DD
3.3V
V
DDQ
2.5V
5%
3.3V
/+10%
Com
’
l
0
°
C to +70
°
C
5%/+10%
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C1347G-200BGXI | 4-Mbit (128K x 36) Pipelined Sync SRAM |
| CY7C1347G | 4-Mbit (128K x 36) Pipelined Sync SRAM |
| CY7C1347G-133AXC | 4-Mbit (128K x 36) Pipelined Sync SRAM |
| CY7C1347G-133AXI | 4-Mbit (128K x 36) Pipelined Sync SRAM |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1339-166AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1339A-100AC | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:4MB (128K X 32 )- BURST SYNCHROUNOUS PIPELINE SRAM - Bulk 制造商:Cypress Semiconductor 功能描述:128KX32 4M PIPELINE 3.3V CACHE 100.000 MHZ |
| CY7C1339A-100ACT | 制造商:Cypress Semiconductor 功能描述:4M- 128KX32 3.3V PIPELINE 1CD-SYNCHRONOUS SRAM - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:4M- 128KX32 3.3V PIPELINE 1CD-SYNCHRONOUS SRAM - Tape and Reel |
| CY7C1339A-66AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY7C1339A-83AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
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