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參數(shù)資料
| 型號(hào)： | CY7C1041CV33-10BAXI |
| 廠(chǎng)商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 4-Mbit (256K x 16) Static RAM |
| 中文描述： | 256K X 16 STANDARD SRAM, 10 ns, PBGA48 |
| 封裝： | 7 X 8.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 595K |
| 代理商： | CY7C1041CV33-10BAXI |
CY7C1041CV33
Document #: 38-05134 Rev. *H
Page 5 of 12
AC Test Loads and Waveforms
[4]
10-ns Devices
Thermal Resistance
[3]
Parameter
Θ
JA
Θ
JC
Description
Test Conditions
TSOP-II
42.96
10.75
FBGA
38.15
9.15
SOJ
25.99
18.8
Unit
°
C/W
°
C/W
Thermal Resistance (Junction to Ambient) Test conditions follow standard
Thermal Resistance (Junction to Case)
test methods and procedures for
measuring thermal impedance,
per EIA / JESD51.
AC Switching Characteristics
[5]
Over the Operating Range
Parameter
Read Cycle
t
power[6]
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
t
DBE
t
LZBE
t
HZBE
Notes:
4. AC characteristics (except High-Z) for 10-ns parts are tested using the load conditions shown in Figure (a). All other speeds are tested using the Thevenin load
shown in Figure (b). High-Z characteristics are tested for all speeds using the test load shown in Figure (d).
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
6. t
POWER
gives the minimum amount of time that the power supply should be at typical V
values until the first memory access can be performed.
7. t
, t
, and t
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured
±
500 mV from steady-state voltage
8. At any given temperature and voltage condition, t
is less than t
, t
is less than t
, and t
is less than t
for any given device.
9. The internal Write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a Write, and the transition of
either of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the
Write.
Description
-10
-12
-15
-20
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
V
CC
(typical) to the first access
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
[7, 8]
CE LOW to Low-Z
[8]
CE HIGH to High-Z
[7, 8]
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low-Z
Byte Disable to High-Z
100
10
100
12
100
15
100
20
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
12
15
20
3
3
3
3
10
5
12
6
15
7
20
8
0
0
0
0
5
6
7
8
3
3
3
3
5
6
7
8
0
0
0
0
10
5
12
6
15
7
20
8
0
0
0
0
6
6
7
8
90%
10%
3.0V
GND
90%
10%
ALL INPUT PULSES
3.3V
OUTPUT
30 pF
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
(b)
R 317
R2
351
Rise Time: 1 V/ns
Fall Time: 1 V/ns
30 pF*
OUTPUT
Z = 50
50
1.5V
(c)
(a)
3.3V
OUTPUT
5 pF
(d)
R 317
R2
351
12-, 15-, 20-ns Devices
High-Z Characteristics
[+] Feedback
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1041CV33-10BAXIT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1041CV33-10VC | 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- FAST ASYNCH SRAM - Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY7C1041CV33-10VXC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1041CV33-10ZSXA | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256K x 16 3.3V R7 ASYNC 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪(fǎng)問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1041CV33-10ZSXAKJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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