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參數(shù)資料
| 型號(hào)： | CY7C1019BV33-10VC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 128K x 8 Static RAM |
| 中文描述： | 128K X 8 STANDARD SRAM, 10 ns, PDSO32 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-32 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 252K |
| 代理商： | CY7C1019BV33-10VC |
128K x 8 Static RAM
CY7C1019BV33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
January 19, 2001
3
Features
High speed
—t
AA
= 10 ns
CMOS for optimum speed/power
Center power/ground pinout
Automatic power-down when deselected
Easy memory expansion with CE
and OE options
Functionally equivalent to CY7C1019V33
Functional Description
The CY7C1019BV33 is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location speci-
fied on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019BV33 is available in a standard 400-mil-wide
package.
1
A
1
A
Logic Block Diagram
Pin Configurations
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
I/O0
I/O1
I/O2
I/O3
512 x 256 x 8
ARRAY
I/O7
I/O6
I/O5
I/O4
A
0
A
1
A
1
A
1
A
1
CE
A
1
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
19
18
20
24
23
22
21
25
28
27
26
Top View
SOJ
29
32
31
30
16
17
A
7
A
1
A
2
A
3
CE
I/O
0
I/O
1
V
CC
V
SS
A
13
OE
I/O
7
I/O
6
V
SS
A
16
A
15
A
14
A
12
A
11
A
10
A
9
A
8
I/O
2
I/O
3
WE
A
0
A
4
A
5
A
6
I/O
4
V
CC
I/O
5
1019BV33–1
1019BV33–2
Selection Guide
7C1019BV33-10
10
175
5
7C1019BV33-12
12
160
5
0.5
7C1019BV33-15
15
145
5
0.5
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
L
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PDF描述 |
|---|---|
| CY7C1019CV33-12ZI | 128K x 8 Static RAM |
| CY7C1019CV33-15VC | 128K x 8 Static RAM |
| CY7C1019CV33-15VI | 128K x 8 Static RAM |
| CY7C1019CV33-15ZC | 128K x 8 Static RAM |
| CY7C1019B | 128K x 8 Static RAM(128K x 8靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1019BV33-10VCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1019BV33-12VC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1019BV33-12VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1019BV33-12ZC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1019BV33-15VC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 1M-Bit 128K x 8 15ns 32-Pin SOJ 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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