參數(shù)資料
型號: CY7C1019
廠商: Cypress Semiconductor Corp.
英文描述: 128K x 8 Static RAM(128K x 8 靜態(tài) RAM)
中文描述: 128K的× 8靜態(tài)RAM(128K的× 8靜態(tài)RAM)的
文件頁數(shù): 1/7頁
文件大小: 141K
代理商: CY7C1019
PRELIMINARY
128K x 8 Static RAM
CY7C1019
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
April 1995 - Revised April 6, 1998
408-943-2600
Features
High speed
—t
AA
= 10 ns
CMOS for optimum speed/power
Center power/ground pinout
Automatic power-down when deselected
Easy memory expansion with CE
and OE options
Functional Description
The CY7C1019 is a high-performance CMOS static RAM or-
ganized as 131,072 words by 8 bits. Easy memory expansion
is provided by an active LOW chip enable (CE), an active LOW
output enable (OE), and three-state drivers. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking chip enable
(CE) and write enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location speci-
fied on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking chip en-
able (CE) and output enable (OE) LOW while forcing write en-
able (WE) HIGH. Under these conditions, the contents of the
memory location specified by the address pins will appear on
the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019 is available in standard 400-mil-wide SOJs.
1
A
1
A
Logic Block Diagram
Pin Configuration
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
512 x 256 x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
A
1
CE
A
1
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
19
18
20
24
23
22
21
25
28
27
26
Top View
SOJ
29
32
31
30
16
17
A
7
A
1
A
2
A
3
CE
I/O
0
I/O
1
V
CC
V
SS
A
13
OE
I/O
7
I/O
6
V
SS
A
16
A
15
A
14
A
12
A
11
A
10
A
9
A
8
I/O
2
I/O
3
WE
A
0
A
4
A
5
A
6
I/O
4
V
CC
I/O
5
1019–1
1019–2
Selection Guide
7C1019–10
10
240
210
10
1
7C1019–12
12
220
190
10
1
7C1019–15
15
200
175
10
1
Maximum Access Time (ns)
Maximum Operating Current (mA)
L
Maximum Standby Current (mA)
L
Shaded areas contain advance information.
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