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參數(shù)資料
| 型號(hào)： | CY7C09269 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16K x16 Synchronous Dual Port Static RAM(16K x 16 同步雙端口靜態(tài) RAM) |
| 中文描述： | 16K的x16同步雙端口靜態(tài)存儲(chǔ)器（16K的× 16同步雙端口靜態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 1/19頁(yè) |
| 文件大?。?/td> | 345K |
| 代理商： | CY7C09269 |
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PRELIMINARY
16K/32K/64K x16/18
Synchronous Dual Port Static RAM
Low operating power
—Active = 195 mA (typical)
—Standby = 0.05 mA (typical)
Fully synchronous interface for easier operation
Burst counters increment addresses internally
—Shorten cycle times
—Minimize bus noise
—Supported in Flow-Through and Pipelined modes
Dual Chip Enables for easy depth expansion
Upper and Lower Byte Controls for Bus Matching
Automatic power-down
Commercial and Industrial temperature ranges
Available in 100-pin TQFP
Pin-compatible and functionally equivalent to
IDT709269, IDT70927, and IDT709279
CY7C09269/79/89
CY7C09369/79/89
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
October 18, 1999
1
Features
True dual-ported memory cells which allow simulta-
neous access of the same memory location
Six Flow-Through/Pipelined devices
—16K x 16/18 organization (CY7C09269/369)
—32K x 16/18 organization (CY7C09279/379)
—64K x 16/18 organization (CY7C09289/389)
Three Modes
—Flow-Through
—Pipelined
—Burst
Pipelined output mode on both ports allows fast 100-
MHz cycle time
0.35-micron CMOS for optimum speed/power
High-speed clock to data access 6.5
[1]
/7.5/9/12 ns (max.)
Notes:
1.
2.
3.
4.
See page 6 for Load Conditions.
I/O
8
–I/O
15
for x16 devices; I/O
–I/O
for x18 devices.
I/O
0
–I/O
for x16 devices. I/O
–I/O
8
for x18 devices.
A
0
–A
13
for 16K; A
0
–A
14
for 32K; A
0
–A
15
for 64K devices.
Logic Block Diagram
R/W
L
UB
L
1
0
0/1
CE
0L
CE
1L
LB
L
OE
L
1b
0/1
0b 1a 0a
b
FT/Pipe
L
I/O
8/9L
–I/O
15/17L
I/O
0L
–I/O
7/8L
I/O
Control
Counter/
Address
Register
Decode
A
0L
–A
13/14/15L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
True Dual-Ported
RAM Array
R/W
R
UB
R
1
0
0/1
CE
0R
CE
1R
LB
R
OE
R
1b
0/1
0b
1a
0a
b
a
FT/Pipe
R
I/O
Control
Counter/
Address
Register
Decode
14/15/16
8/9
8/9
I/O
8/9R
–I/O
15/17R
I/O
0R
–I/O
7/8R
A
0R
–A
13/14/15R
CLK
R
ADS
R
CNTEN
R
CNTRST
R
14/15/16
8/9
8/9
[2]
[3]
[2]
[3]
[4]
[4]
For the most recent information, visit the Cypress web site at www.cypress.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C09279 | 32K x16 Synchronous Dual Port Static RAM(32K x 16 同步雙端口靜態(tài) RAM) |
| CY7C09289 | 64K x16 Synchronous Dual Port Static RAM(64K x 16 同步雙端口靜態(tài) RAM) |
| CY7C09369 | 16Kx18 Synchronous Dual Port Static RAM(16K x 18 同步雙端口靜態(tài) RAM) |
| CY7C09379 | 32K x18 Synchronous Dual Port Static RAM(32K x 18 同步雙端口靜態(tài) RAM) |
| CY7C09449PV-AC | 128 Kb Dual-Port SRAM with PCI Bus Controller (PCI-DP) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C09269-12AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C092694V-12AXI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C09269A-12AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 5V 256K-Bit 16K x 16 25ns/12ns 100-Pin TQFP |
| CY7C09269A-9AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 5V 256K-Bit 16K x 16 20ns/9ns 100-Pin TQFP |
| CY7C09269V-12AC | 制造商:Rochester Electronics LLC 功能描述:3.3V 16KX16 SYNC DUAL PORT - Bulk |
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